From d4d4c3a6a357a066bc6a538078d742e94d7e5b6b Mon Sep 17 00:00:00 2001 From: adri Date: Sat, 9 Jun 2018 17:38:15 +0200 Subject: [PATCH] Depart avec chenillard3 --- ASM18b20AvecLCD.asmproj | 74 +++++++++++++++++++++++++ ASM18b20AvecLCD.componentinfo.xml | 64 ++++++++++++++++++++++ main.asm | 90 +++++++++++++++++++++++++++++++ 3 files changed, 228 insertions(+) create mode 100644 ASM18b20AvecLCD.asmproj create mode 100644 ASM18b20AvecLCD.componentinfo.xml create mode 100644 main.asm diff --git a/ASM18b20AvecLCD.asmproj b/ASM18b20AvecLCD.asmproj new file mode 100644 index 0000000..54dede9 --- /dev/null +++ b/ASM18b20AvecLCD.asmproj @@ -0,0 +1,74 @@ + + + + 2.0 + 7.0 + com.Atmel.AVRAssembler + 59B1D629-9DCC-43ed-A0FD-8AB0E4D622AB + none + ATmega328P + $(MSBuildProjectName) + .obj + $(MSBuildProjectDirectory)\$(Configuration) + ASSEMBLY + ASM18b20AvecLCD + ASM18b20AvecLCD + ASM18b20AvecLCD + Native + $(MSBuildProjectDirectory)\main.asm + true + false + true + true + + + true + + 2 + 0 + 0 + + + + + + + + + + + + + + + + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.2.150\avrasm\inc + + + m328pdef.inc + + + + + + + + + %24(PackRepoDir)\atmel\ATmega_DFP\1.2.150\avrasm\inc + + + m328pdef.inc + + + + + + Code + + + + \ No newline at end of file diff --git a/ASM18b20AvecLCD.componentinfo.xml b/ASM18b20AvecLCD.componentinfo.xml new file mode 100644 index 0000000..8111f1d --- /dev/null +++ b/ASM18b20AvecLCD.componentinfo.xml @@ -0,0 +1,64 @@ + + + + + + + Device + Startup + + + Atmel + 1.2.0 + C:/Program Files (x86)\Atmel\Studio\7.0\Packs + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.2.150\avrasm\inc + + include + AVRASM + + + avrasm/inc + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.2.150\avrasm\inc\m328pdef.inc + + header + AVRASM + YpGdK/vCoyGIUkMyqjAbKQ== + + avrasm/inc/m328pdef.inc + + + + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.2.150\avrasm\templates\main.asm + template + source + AVRASM + jEqxGSx+2zHMFiTZ3UD6Xg== + + avrasm/templates/main.asm + Main file (.asm) + + + + ATmega_DFP + C:/Program Files (x86)/Atmel/Studio/7.0/Packs/atmel/ATmega_DFP/1.2.150/Atmel.ATmega_DFP.pdsc + 1.2.150 + true + ATmega328P + + + + Resolved + Fixed + true + + + \ No newline at end of file diff --git a/main.asm b/main.asm new file mode 100644 index 0000000..1422fb3 --- /dev/null +++ b/main.asm @@ -0,0 +1,90 @@ +; +; chenillarEssai3.asm +; +; Created: 19-03-18 13:13:56 +; Author : Adrien +; +.dseg +.def rtmp = r16 +.def rdec = r17 +.def rsens = r18 + +.cseg +.include "m328pdef.inc" + +.org 0x0000 +jmp RESET +.org OC0Aaddr +jmp TIM0_COMPA ; Timer0 CompareA +.org OVF0addr +jmp TIM0_OVF + + + +.org 0x0100 + +RESET: +ldi rtmp, HIGH(RAMEND) ;Charge la valeur haute de l?adresse en fin m?moire RAM +out SPH, rtmp ;Positionne le pointeur de pile haut sur cette adresse +ldi rtmp, LOW(RAMEND) ;Charge la valeur basse de l?adresse en fin m?moire RAM +out SPL, rtmp ;Positionne le pointeur de pile bas sur cette adresse +; Replace with your application code +ser rtmp ;Port en sortie (les bits du port sont mis ? 1, soit en sortie) +out DDRD, rtmp ;Ecriture sur le +clr rtmp ;Port en bas (les bits du port sont mis ? 0, Led ?teinte) +ldi rtmp, 0x01 +out PORTD, rtmp ;PINB1 Mis ? 1 +clr rsens +;_____________________________________________________________________________ +;Setup Timer0 +;_____________________________________________________________________________ +CLR rtmp +OUT TCCR0A, rtmp ;Normal port op +LDI rtmp, 0x01 +OUT TCCR0B, rtmp ; No Force, No wave, Clk from precal/1024, 7.8125Khz, 128?s +ldi rtmp, 0x02 +sts TIMSK0, rtmp ; OCR0A Interrupt Enable +CLR rtmp +OUT TCNT0, rtmp ; +LDI rtmp, 0xff +OUT OCR0A, rtmp ; 256*128?s = 16ms +LDI rdec, 0xFF +;_____________________________________________________________________________ +;Setup PWM Timer0 +;_____________________________________________________________________________ + +SEI + + +start: + nop + nop + nop + jmp PC-2 + + +TIM0_COMPA: +dec rdec +BRNE PC+7 +in rtmp, PORTD +lsl rtmp ;Shift left +BRCC PC+2; Si le cary est ? 0 rtmp est dif de 0x00 Si carry est ? 1, rtmp = 0x00 donc on le met ? 0x01 +ldi rtmp, 0x01 +out PORTD, rtmp +ldi r18, 0xff +ldi rtmp, 0x00 +out TCNT0, rtmp +reti ;Fin de l?interruption + +TIM0_OVF: +dec rdec +BRNE PC+1 + + + +in rtmp, PORTD +lsl rtmp ;Shift left +BRCC PC+2; Si le cary est ? 0 rtmp est dif de 0x00 Si carry est ? 1, rtmp = 0x00 donc on le met ? 0x01 +ldi rtmp, 0x01 +out PORTD, rtmp +reti \ No newline at end of file