From d0e6eb4795293cf2a95814b46a7b4d0131c9e937 Mon Sep 17 00:00:00 2001 From: adri Date: Sun, 10 Jun 2018 03:43:12 +0200 Subject: [PATCH] commit avent dodo --- 1-wire.asm | 196 ++ ASM18b20AvecLCD.asmproj | 21 + Debug/ASM18b20AvecLCD.hex | 79 + Debug/ASM18b20AvecLCD.lss | 1954 ++++++++++++++++++ Debug/ASM18b20AvecLCD.map | 772 +++++++ Debug/ASM18b20AvecLCD.obj | Bin 0 -> 4919 bytes Debug/ASM18b20AvecLCD.tmp | 89 + crc8.asm | 67 + div8u.asm | 29 + hd44780.asm | 215 ++ hd44780.inc | 38 + ibutton-numberSample/1-wire.asm | 113 + ibutton-numberSample/AvrBuild.bat | 2 + ibutton-numberSample/crc8.asm | 67 + ibutton-numberSample/div8u.asm | 29 + ibutton-numberSample/hd44780.asm | 216 ++ ibutton-numberSample/hd44780.inc | 38 + ibutton-numberSample/ibutton-number-read.aps | 1 + ibutton-numberSample/ibutton-number-read.aws | 1 + ibutton-numberSample/ibutton-number-read.hex | 43 + ibutton-numberSample/ibutton-number-read.map | 522 +++++ ibutton-numberSample/ibutton-number-read.obj | Bin 0 -> 3455 bytes ibutton-numberSample/labels.tmp | 75 + ibutton-numberSample/main.asm | 107 + ibutton-numberSample/vectors.asm | 39 + ibutton-numberSample/wait.asm | 47 + main.asm | 256 ++- vectors.asm | 92 + wait.asm | 47 + 29 files changed, 5081 insertions(+), 74 deletions(-) create mode 100644 1-wire.asm create mode 100644 Debug/ASM18b20AvecLCD.hex create mode 100644 Debug/ASM18b20AvecLCD.lss create mode 100644 Debug/ASM18b20AvecLCD.map create mode 100644 Debug/ASM18b20AvecLCD.obj create mode 100644 Debug/ASM18b20AvecLCD.tmp create mode 100644 crc8.asm create mode 100644 div8u.asm create mode 100644 hd44780.asm create mode 100644 hd44780.inc create mode 100644 ibutton-numberSample/1-wire.asm create mode 100644 ibutton-numberSample/AvrBuild.bat create mode 100644 ibutton-numberSample/crc8.asm create mode 100644 ibutton-numberSample/div8u.asm create mode 100644 ibutton-numberSample/hd44780.asm create mode 100644 ibutton-numberSample/hd44780.inc create mode 100644 ibutton-numberSample/ibutton-number-read.aps create mode 100644 ibutton-numberSample/ibutton-number-read.aws create mode 100644 ibutton-numberSample/ibutton-number-read.hex create mode 100644 ibutton-numberSample/ibutton-number-read.map create mode 100644 ibutton-numberSample/ibutton-number-read.obj create mode 100644 ibutton-numberSample/labels.tmp create mode 100644 ibutton-numberSample/main.asm create mode 100644 ibutton-numberSample/vectors.asm create mode 100644 ibutton-numberSample/wait.asm create mode 100644 vectors.asm create mode 100644 wait.asm diff --git a/1-wire.asm b/1-wire.asm new file mode 100644 index 0000000..577392d --- /dev/null +++ b/1-wire.asm @@ -0,0 +1,196 @@ +;------------------------------------------------------------------------------ +; +;------------------------------------------------------------------------------ +.equ OW_PORT = PORTB +.equ OW_PIN = PINB +.equ OW_DDR = DDRB +.equ OW_DQ = PB0 + +.def OWCount = r17 + + + +#define ReadRom 0x33 +#define SkipRom 0xcc +#define ConvertTemp 0x44 ; Initiates temperature conversion. +#define WScratch 0x4e ; Writes data into scratchpad bytes 2, 3, and4 (TH, TL, and configuration registers). +#define RScratch 0xbe +;------------------------------------------------------------------------------ +; +;------------------------------------------------------------------------------ + +;------------------------------------------------------------------------------ +; Data segment, variable definitions +;------------------------------------------------------------------------------ +.dseg +TempWord: .byte 3 +TRegister: .byte 3 +ConfigRegister: .byte 2 + + + + +.cseg +;------------------------------------------------------------------------------ +; Output : T - presence bit +;------------------------------------------------------------------------------ +OWReset: + cbi OW_PORT,OW_DQ + sbi OW_DDR,OW_DQ + + ldi XH, HIGH(DVUS(470)) + ldi XL, LOW(DVUS(470)) + rcall Wait4xCycles + + cbi OW_DDR,OW_DQ + + ldi XH, HIGH(DVUS(70)) + ldi XL, LOW(DVUS(70)) + rcall Wait4xCycles + + set + sbis OW_PIN,OW_DQ + clt + + ldi XH, HIGH(DVUS(240)) + ldi XL, LOW(DVUS(240)) + rcall Wait4xCycles + + ret +;------------------------------------------------------------------------------ +; Input : C - bit to write +;------------------------------------------------------------------------------ +OWWriteBit: + brcc OWWriteZero + ldi XH, HIGH(DVUS(1)) + ldi XL, LOW(DVUS(1)) + rjmp OWWriteOne +OWWriteZero: + ldi XH, HIGH(DVUS(120)) + ldi XL, LOW(DVUS(120)) +OWWriteOne: + sbi OW_DDR, OW_DQ + rcall Wait4xCycles + cbi OW_DDR, OW_DQ + + ldi XH, HIGH(DVUS(60)) + ldi XL, LOW(DVUS(60)) + rcall Wait4xCycles + ret +;------------------------------------------------------------------------------ +; Input : r16 - byte to write +;------------------------------------------------------------------------------ +OWWriteByte: + push OWCount + ldi OWCount,0 +OWWriteLoop: + ror r16 + rcall OWWriteBit + inc OWCount + cpi OWCount,8 + brne OWWriteLoop + pop OWCount + ret +;------------------------------------------------------------------------------ +; Output : C - bit from slave +;------------------------------------------------------------------------------ +OWReadBit: + ldi XH, HIGH(DVUS(1)) + ldi XL, LOW(DVUS(1)) + sbi OW_DDR, OW_DQ + rcall Wait4xCycles + cbi OW_DDR, OW_DQ + ldi XH, HIGH(DVUS(5)) + ldi XL, LOW(DVUS(5)) + rcall Wait4xCycles + clt + sbic OW_PIN,OW_DQ + set + ldi XH, HIGH(DVUS(50)) + ldi XL, LOW(DVUS(50)) + rcall Wait4xCycles + sec + brts OWReadBitEnd + clc +OWReadBitEnd: + ret +;------------------------------------------------------------------------------ +; Output : r16 - byte from slave +;------------------------------------------------------------------------------ +OWReadByte: + push OWCount + ldi OWCount,0 +OWReadLoop: + rcall OWReadBit + ror r16 + inc OWCount + cpi OWCount,8 + brne OWReadLoop + pop OWCount + ret +;------------------------------------------------------------------------------ +; 18b20 MainReadTemp +;------------------------------------------------------------------------------ +MainReadTemp: + + ldi YL,LOW(TempWord) + ldi YH,HIGH(TempWord) + rcall OWReset ; One wire reset + brts MainReadTemp ; If device not present go to MainLoop + rcall OWReset ; One wire reset + brts MainReadTemp ; If device not present go to MainLoop + rcall OWReset ; One wire reset + brts MainReadTemp ; If device not present go to MainLoop + ldi r16,SkipRom ; Write Skip Rom one wire in "single-drop" + rcall OWWriteByte ; + ldi r16, RScratch ; Write ConvertCommand + rcall OWWriteByte ; + rcall OWReadByte + st Y+, r16 ; Store TEMPERATURE LSB(50h) byte to table, and increment pointer + mov r21, r16 + rcall OWReadByte + st Y+, r16 ; Store TEMPERATURE MSB(05h) byte to table, and increment pointer + mov r22, r16 + ret + +TempRequest: + rcall OWReset ; One wire reset + brts MainReadTemp ; If device not present go to MainLoop + + ldi r16,SkipRom ; Write Skip Rom one wire in "single-drop" + rcall OWWriteByte ; + ldi r16, ConvertTemp ; Write ConvertCommand + rcall OWWriteByte ; + ldi r16, 188 + rcall WaitMiliseconds + reti + +ConvertTempForLCD: ;r18 contiendra la partie décimal et xl la partie entiere + push r16 + push r17 + ldi YL,LOW(TempWord) + ldi YH,HIGH(TempWord) + ld XL, Y+ + ld XH, Y+ + lsr XL + lsr XL ;Sup des deux bit inutilisé + ldi r16, 0x03 + mov r18, XL + AND r18, r16 + ldi r16, 25 + mul r18, r16 + movw r18, r0 + lsr XL + lsr XL ;Sup des deux bit de fraction + ldi r16, 15 + and XH,r16 + ROR XH + ROR XH + ROR XH + ROR XH + ROR XH ; xh>>4+1(+1 pour le carry) + or XL,XH + + pop r17 + pop r16 + ret diff --git a/ASM18b20AvecLCD.asmproj b/ASM18b20AvecLCD.asmproj index 54dede9..7f34c71 100644 --- a/ASM18b20AvecLCD.asmproj +++ b/ASM18b20AvecLCD.asmproj @@ -66,9 +66,30 @@ + + Code + + + Code + + + Code + + + Code + + + Code + Code + + Code + + + Code + \ No newline at end of file diff --git a/Debug/ASM18b20AvecLCD.hex b/Debug/ASM18b20AvecLCD.hex new file mode 100644 index 0000000..eccdb11 --- /dev/null +++ b/Debug/ASM18b20AvecLCD.hex @@ -0,0 +1,79 @@ +:020000020000FC +:0200000070C1CD +:0200040018954D +:02000800189549 +:02000C00189545 +:02001000189541 +:0200140018953D +:02001800189539 +:02001C00189535 +:02002000189531 +:0200240018952D +:02002800189529 +:02002C00189525 +:02003000189521 +:0200340018951D +:02003800189519 +:02003C00189515 +:02004000189511 +:0200440018950D +:02004800189509 +:02004C00189505 +:02005000189501 +:020054001895FD +:020058001895F9 +:02005C001895F5 +:020060001895F1 +:100064001895FF1829E0001F2A9509F40895FF1C2C +:10007400F11A18F4F10E8894F6CF0894F4CF5F9A2D +:1000840000FF5D9800FD5D9A01FF5C9801FD5C9A9C +:1000940002FF5B9802FD5B9A03FF5A9803FD5A9A8C +:1000A4005F9808955E9A0F930295E9DF0F91E7DF59 +:1000B400BB27AAEF58D008955E980F930295DFDF0F +:1000C4000F91DDDF02E052D008950591003011F068 +:1000D400E9DFFBCF08950A3020F017E3010FE2DFD8 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+:10024400C8E0D1E0A991B991A695A69503E02A2F1B +:10025400202309E1209F9001A695A6950FE0B023E5 +:10026400B795B795B795B795B795AB2B1F910F91E8 +:1002740008950F931F932F930F9318E0209110016B +:10028400022707950091100110F428E10227079531 +:10029400009310010F9106950F931A9579F70F911A +:1002A4002F911F910F9108950F9300E00093100177 +:1002B4000F91089500911001089569427574746F47 +:1002C4006E2052656164657200006176722D6D6303 +:1002D400752E6478702E706C00002E0000000FEFF5 +:1002E4000DBF21DF01E019DFEEEBF2E0EEDE01E409 +:1002F40014DF47DFF6F30CEC61DF0EE45FDF002769 +:100304005DDF5CDF0FE35ADF01E407DF3ADFE6F38A +:100314008CDF78DF93DF0C94A4016BDF0030A1F352 +:10032400A8DFC0E0D1E0099317E063DFA2DF0993FF +:100334001A95D9F7BFDF003039F700E4EEDEC0E0EC +:10034400D1E012E00F930A2F0F9330EF032320D054 +:100354000695069506950695BEDE0F9119D02FE0F9 +:100364000223B9DE022F0F9330EF032311D0069539 +:10037400069506950695AFDE0F910AD02FE002236D +:10038400AADE0000000000000C948601D9F6BCCF60 +:1003940055270A5010F0505FFCCF065F050F0895F3 +:00000001FF diff --git a/Debug/ASM18b20AvecLCD.lss b/Debug/ASM18b20AvecLCD.lss new file mode 100644 index 0000000..c0a927d --- /dev/null +++ b/Debug/ASM18b20AvecLCD.lss @@ -0,0 +1,1954 @@ + +AVRASM ver. 2.2.7 C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm Sun Jun 10 03:42:22 2018 + +[builtin](2): Including file 'C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.2.150\avrasm\inc\m328pdef.inc' +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm(34): Including file 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\vectors.asm' +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm(35): Including file 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm' +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm(7): Including file 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.inc' +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm(29): Including file 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\div8u.asm' +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\div8u.asm(6): warning: Register r16 already defined by the .DEF directive +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm(29): 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\div8u.asm' included form here +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm(35): 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm' included form here +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm(36): Including file 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\wait.asm' +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm(37): Including file 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm' +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm(9): warning: Register r17 already defined by the .DEF directive +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm(37): 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm' included form here +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm(38): Including file 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\crc8.asm' +[builtin](2): Including file 'C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.2.150\avrasm\inc\m328pdef.inc' +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm(34): Including file 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\vectors.asm' +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm(35): Including file 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm' +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm(7): Including file 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.inc' +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm(29): Including file 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\div8u.asm' +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm(36): Including file 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\wait.asm' +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm(37): Including file 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm' +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm(38): Including file 'C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\crc8.asm' + + ;------------------------------------------------------------------------------ + + ;***** Created: 2011-02-09 12:03 ******* Source: ATmega328P.xml ********** + ;************************************************************************* + ;* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y + ;* + ;* Number : AVR000 + ;* File Name : "m328Pdef.inc" + ;* Title : Register/Bit Definitions for the ATmega328P + ;* Date : 2011-02-09 + ;* Version : 2.35 + ;* Support E-mail : avr@atmel.com + ;* Target MCU : ATmega328P + ;* + ;* DESCRIPTION + ;* When including this file in the assembly program file, all I/O register + ;* names and I/O register bit names appearing in the data book can be used. + ;* In addition, the six registers forming the three data pointers X, Y and + ;* Z have been assigned names XL - ZH. Highest RAM address for Internal + ;* SRAM is also defined + ;* + ;* The Register names are represented by their hexadecimal address. + ;* + ;* The Register Bit names are represented by their bit number (0-7). + ;* + ;* Please observe the difference in using the bit names with instructions + ;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc" + ;* (skip if bit in register set/cleared). The following example illustrates + ;* this: + ;* + ;* in r16,PORTB ;read PORTB latch + ;* sbr r16,(1<= 4MHz + ; http://avr-mcu.dxp.pl + ; e-mail : radek@dxp.pl + ; (c) Radoslaw Kwiecien + ;------------------------------------------------------------------------------ + + #ifndef F_CPU + #endif + + #if F_CPU < 4000000 + #endif + + #define CYCLES_PER_US (F_CPU/1000000) + #define C4PUS (CYCLES_PER_US/4) + #define DVUS(x) (C4PUS*x) + + ;------------------------------------------------------------------------------ + ; Input : XH:XL - number of CPU cycles to wait (divided by four) + ;------------------------------------------------------------------------------ + Wait4xCycles: +0000b5 9711 sbiw XH:XL, 1 ; x-- (2 cycles) +0000b6 f7f1 brne Wait4xCycles ; jump if not zero (2 cycles) +0000b7 9508 ret + + ;------------------------------------------------------------------------------ + ; Input : r16 - number of miliseconds to wait + ;------------------------------------------------------------------------------ + WaitMiliseconds: +0000b8 930f push r16 + WaitMsLoop: +0000b9 e0b7 ldi XH,HIGH(DVUS(500)) +0000ba eda0 ldi XL,LOW(DVUS(500)) +0000bb dff9 rcall Wait4xCycles +0000bc e0b7 ldi XH,HIGH(DVUS(500)) +0000bd eda0 ldi XL,LOW(DVUS(500)) +0000be dff6 rcall Wait4xCycles +0000bf 950a dec r16 +0000c0 f7c1 brne WaitMsLoop +0000c1 910f pop r16 +0000c2 9508 ret + ;------------------------------------------------------------------------------ + ; + ;------------------------------------------------------------------------------ + #include "1-wire.asm" + + ; + ;------------------------------------------------------------------------------ + .equ OW_PORT = PORTB + .equ OW_PIN = PINB + .equ OW_DDR = DDRB + .equ OW_DQ = PB0 + + .def OWCount = r17 + + + + #define ReadRom 0x33 + #define SkipRom 0xcc + #define ConvertTemp 0x44 ; Initiates temperature conversion. + #define WScratch 0x4e ; Writes data into scratchpad bytes 2, 3, and4 (TH, TL, and configuration registers). + #define RScratch 0xbe + ;------------------------------------------------------------------------------ + ; + ;------------------------------------------------------------------------------ + + ;------------------------------------------------------------------------------ + ; Data segment, variable definitions + ;------------------------------------------------------------------------------ + .dseg +000108 TempWord: .byte 3 +00010b TRegister: .byte 3 +00010e ConfigRegister: .byte 2 + + + + + .cseg + ;------------------------------------------------------------------------------ + ; Output : T - presence bit + ;------------------------------------------------------------------------------ + OWReset: +0000c3 9828 cbi OW_PORT,OW_DQ +0000c4 9a20 sbi OW_DDR,OW_DQ + +0000c5 e0b7 ldi XH, HIGH(DVUS(470)) +0000c6 e5a8 ldi XL, LOW(DVUS(470)) +0000c7 dfed rcall Wait4xCycles + +0000c8 9820 cbi OW_DDR,OW_DQ + +0000c9 e0b1 ldi XH, HIGH(DVUS(70)) +0000ca e1a8 ldi XL, LOW(DVUS(70)) +0000cb dfe9 rcall Wait4xCycles + +0000cc 9468 set +0000cd 9b18 sbis OW_PIN,OW_DQ +0000ce 94e8 clt + +0000cf e0b3 ldi XH, HIGH(DVUS(240)) +0000d0 eca0 ldi XL, LOW(DVUS(240)) +0000d1 dfe3 rcall Wait4xCycles + +0000d2 9508 ret + ;------------------------------------------------------------------------------ + ; Input : C - bit to write + ;------------------------------------------------------------------------------ + OWWriteBit: +0000d3 f418 brcc OWWriteZero +0000d4 e0b0 ldi XH, HIGH(DVUS(1)) +0000d5 e0a4 ldi XL, LOW(DVUS(1)) +0000d6 c002 rjmp OWWriteOne + OWWriteZero: +0000d7 e0b1 ldi XH, HIGH(DVUS(120)) +0000d8 eea0 ldi XL, LOW(DVUS(120)) + OWWriteOne: +0000d9 9a20 sbi OW_DDR, OW_DQ +0000da dfda rcall Wait4xCycles +0000db 9820 cbi OW_DDR, OW_DQ + +0000dc e0b0 ldi XH, HIGH(DVUS(60)) +0000dd efa0 ldi XL, LOW(DVUS(60)) +0000de dfd6 rcall Wait4xCycles +0000df 9508 ret + ;------------------------------------------------------------------------------ + ; Input : r16 - byte to write + ;------------------------------------------------------------------------------ + OWWriteByte: +0000e0 931f push OWCount +0000e1 e010 ldi OWCount,0 + OWWriteLoop: +0000e2 9507 ror r16 +0000e3 dfef rcall OWWriteBit +0000e4 9513 inc OWCount +0000e5 3018 cpi OWCount,8 +0000e6 f7d9 brne OWWriteLoop +0000e7 911f pop OWCount +0000e8 9508 ret + ;------------------------------------------------------------------------------ + ; Output : C - bit from slave + ;------------------------------------------------------------------------------ + OWReadBit: +0000e9 e0b0 ldi XH, HIGH(DVUS(1)) +0000ea e0a4 ldi XL, LOW(DVUS(1)) +0000eb 9a20 sbi OW_DDR, OW_DQ +0000ec dfc8 rcall Wait4xCycles +0000ed 9820 cbi OW_DDR, OW_DQ +0000ee e0b0 ldi XH, HIGH(DVUS(5)) +0000ef e1a4 ldi XL, LOW(DVUS(5)) +0000f0 dfc4 rcall Wait4xCycles +0000f1 94e8 clt +0000f2 9918 sbic OW_PIN,OW_DQ +0000f3 9468 set +0000f4 e0b0 ldi XH, HIGH(DVUS(50)) +0000f5 eca8 ldi XL, LOW(DVUS(50)) +0000f6 dfbe rcall Wait4xCycles +0000f7 9408 sec +0000f8 f00e brts OWReadBitEnd +0000f9 9488 clc + OWReadBitEnd: +0000fa 9508 ret + ;------------------------------------------------------------------------------ + ; Output : r16 - byte from slave + ;------------------------------------------------------------------------------ + OWReadByte: +0000fb 931f push OWCount +0000fc e010 ldi OWCount,0 + OWReadLoop: +0000fd dfeb rcall OWReadBit +0000fe 9507 ror r16 +0000ff 9513 inc OWCount +000100 3018 cpi OWCount,8 +000101 f7d9 brne OWReadLoop +000102 911f pop OWCount +000103 9508 ret + ;------------------------------------------------------------------------------ + ; 18b20 MainReadTemp + ;------------------------------------------------------------------------------ + MainReadTemp: + +000104 e0c8 ldi YL,LOW(TempWord) +000105 e0d1 ldi YH,HIGH(TempWord) +000106 dfbc rcall OWReset ; One wire reset +000107 f3e6 brts MainReadTemp ; If device not present go to MainLoop +000108 dfba rcall OWReset ; One wire reset +000109 f3d6 brts MainReadTemp ; If device not present go to MainLoop +00010a dfb8 rcall OWReset ; One wire reset +00010b f3c6 brts MainReadTemp ; If device not present go to MainLoop +00010c ec0c ldi r16,SkipRom ; Write Skip Rom one wire in "single-drop" +00010d dfd2 rcall OWWriteByte ; +00010e eb0e ldi r16, RScratch ; Write ConvertCommand +00010f dfd0 rcall OWWriteByte ; +000110 dfea rcall OWReadByte +000111 9309 st Y+, r16 ; Store TEMPERATURE LSB(50h) byte to table, and increment pointer +000112 2f50 mov r21, r16 +000113 dfe7 rcall OWReadByte +000114 9309 st Y+, r16 ; Store TEMPERATURE MSB(05h) byte to table, and increment pointer +000115 2f60 mov r22, r16 +000116 9508 ret + + TempRequest: +000117 dfab rcall OWReset ; One wire reset +000118 f35e brts MainReadTemp ; If device not present go to MainLoop + +000119 ec0c ldi r16,SkipRom ; Write Skip Rom one wire in "single-drop" +00011a dfc5 rcall OWWriteByte ; +00011b e404 ldi r16, ConvertTemp ; Write ConvertCommand +00011c dfc3 rcall OWWriteByte ; +00011d eb0c ldi r16, 188 +00011e df99 rcall WaitMiliseconds +00011f 9518 reti + + ConvertTempForLCD: ;r18 contiendra la partie décimal et xl la partie entiere +000120 930f push r16 +000121 931f push r17 +000122 e0c8 ldi YL,LOW(TempWord) +000123 e0d1 ldi YH,HIGH(TempWord) +000124 91a9 ld XL, Y+ +000125 91b9 ld XH, Y+ +000126 95a6 lsr XL +000127 95a6 lsr XL ;Sup des deux bit inutilisé +000128 e003 ldi r16, 0x03 +000129 2f2a mov r18, XL +00012a 2320 AND r18, r16 +00012b e109 ldi r16, 25 +00012c 9f20 mul r18, r16 +00012d 0190 movw r18, r0 +00012e 95a6 lsr XL +00012f 95a6 lsr XL ;Sup des deux bit de fraction +000130 e00f ldi r16, 15 +000131 23b0 and XH,r16 +000132 95b7 ROR XH +000133 95b7 ROR XH +000134 95b7 ROR XH +000135 95b7 ROR XH +000136 95b7 ROR XH ; xh>>4+1(+1 pour le carry) +000137 2bab or XL,XH + +000138 911f pop r17 +000139 910f pop r16 +00013a 9508 ret + #include "crc8.asm" + + ; CRC8 computing functions + ; based on Application Note 27 from Dallas Semiconductor + ; http://avr-mcu.dxp.pl + ; e-mail: radek@dxp.pl + ; (c) Radoslaw Kwiecien + ;------------------------------------------------------------------------------ + + ;------------------------------------------------------------------------------ + ; Data segment + ;------------------------------------------------------------------------------ + .dseg +000110 _crc : .byte 1 + ;------------------------------------------------------------------------------ + ; Code segment + ;------------------------------------------------------------------------------ + .cseg + ;------------------------------------------------------------------------------ + ; Update crc value + ;------------------------------------------------------------------------------ + CRC8Update: +00013b 930f push r16 +00013c 931f push r17 +00013d 932f push r18 +00013e 930f push r16 + +00013f e018 ldi r17, 8 + CRC8L: +000140 9120 0110 lds r18, _crc +000142 2702 eor r16, r18 +000143 9507 ror r16 +000144 9100 0110 lds r16, _crc +000146 f410 brcc CRC8zero +000147 e128 ldi r18, 0x18 +000148 2702 eor r16, r18 + + CRC8zero: +000149 9507 ror r16 +00014a 9300 0110 sts _crc, r16 +00014c 910f pop r16 +00014d 9506 lsr r16 +00014e 930f push r16 +00014f 951a dec r17 +000150 f779 brne CRC8L +000151 910f pop r16 +000152 912f pop r18 +000153 911f pop r17 +000154 910f pop r16 +000155 9508 ret + ;------------------------------------------------------------------------------ + ; Clear crc value + ;------------------------------------------------------------------------------ + CRC8Init: +000156 930f push r16 +000157 e000 ldi r16,0 +000158 9300 0110 sts _crc, r16 +00015a 910f pop r16 +00015b 9508 ret + ;------------------------------------------------------------------------------ + ; Copy crc value to r16 + ;------------------------------------------------------------------------------ + GetCRC8: +00015c 9100 0110 lds r16, _crc +00015e 9508 ret + ;------------------------------------------------------------------------------ + ; End of crc8.asm file + ;------------------------------------------------------------------------------ + ;------------------------------------------------------------------------------ + ; Constants definition + ;------------------------------------------------------------------------------ + Text1 : +00015f 4269 +000160 7475 +000161 6f74 +000162 206e +000163 6552 +000164 6461 +000165 7265 +000166 0000 .db "iButton Reader",0,0 + Text2 : +000167 7661 +000168 2d72 +000169 636d +00016a 2e75 +00016b 7864 +00016c 2e70 +00016d 6c70 +00016e 0000 .db "avr-mcu.dxp.pl",0,0 + Tp : +00016f 002e +C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm(47): warning: .cseg .db misalignment - padding zero byte +000170 0000 .db ".",0,0 + ;------------------------------------------------------------------------------ + ; Program entry point + ;------------------------------------------------------------------------------ + ProgramEntryPoint: +000171 ef0f ldi r16, LOW(RAMEND) ; Initialize stack pointer +000172 bf0d out SPL, r16 ; + +000173 df21 rcall LCD_Init ; Initialize LCD + +000174 e001 ldi r16, (HD44780_LINE0 + 1) ; +000175 df19 rcall LCD_SetAddressDD ; Set Display Data address to (0,1) + +000176 ebee ldi ZL, LOW(Text1 << 1) ; Load string address to Z +000177 e0f2 ldi ZH, HIGH(Text1<< 1) ; +000178 deee rcall LCD_WriteString ; Display string + +000179 e401 ldi r16, (HD44780_LINE1 + 1) ; +00017a df14 rcall LCD_SetAddressDD ; Set Display Data address to (1,1); + + ;ldi ZL, LOW(Text2 << 1) ; + ;ldi ZH, HIGH(Text2<< 1) ; Load string address to Z + ;rcall LCD_WriteString ; Display string + ConfigResolTo10Bits: +00017b df47 rcall OWReset +00017c f3f6 brts ConfigResolTo10Bits +00017d ec0c ldi r16, SkipRom ; Write Skip Rom one wire in "single-drop" +00017e df61 rcall OWWriteByte +00017f e40e ldi r16, WScratch +000180 df5f rcall OWWriteByte +000181 2700 clr r16 +000182 df5d rcall OWWriteByte ;th,tl +000183 df5c rcall OWWriteByte ;th,tl +000184 e30f ldi r16, 63 +000185 df5a rcall OWWriteByte ;resol + + + + MainLoop: +000186 e401 ldi r16, (HD44780_LINE1 + 1) ; +000187 df07 rcall LCD_SetAddressDD ; Set Display Data address to (1,1); +000188 df3a rcall OWReset ; One wire reset +000189 f3e6 brts MainLoop ; If device not present go to MainLoop + +00018a df8c rcall TempRequest +00018b df78 rcall MainReadTemp +00018c df93 rcall ConvertTempForLCD + + ;rcall CRC8Init ; Initialize CRC8 value +00018d 940c 01a4 jmp LoadLoop +00018f df6b rcall OWReadByte ; Read first byte (Family ID) +000190 3000 cpi r16,0 ; If first byte equal to zero, go to MainLoop +000191 f3a1 breq MainLoop ; (short circuit on one wire bus) + +000192 dfa8 rcall CRC8Update ; Update the CRC + +000193 e0c0 ldi YL, LOW(SerialNumber) ; +000194 e0d1 ldi YH, HIGH(SerialNumber) ; Load to Y address of SerialNumber table + +000195 9309 st Y+, r16 ; Store first byte to table, and increment pointer + +000196 e017 ldi r17, 7 ; 7 bytes remaining + StoreLoop: +000197 df63 rcall OWReadByte ; read next byte +000198 dfa2 rcall CRC8Update ; update the CRC +000199 9309 st Y+, r16 ; store next byte to table, and increment pointer +00019a 951a dec r17 ; decrement loop counter +00019b f7d9 brne StoreLoop ; if greater than zero, jump to StoreLoop + +00019c dfbf rcall GetCRC8 ; Read computet CRC8 +00019d 3000 cpi r16,0 ; copmare with zero +00019e f739 brne MainLoop ; if not equal, jump to MainLoop (bad CRC) + ; else +00019f e400 ldi r16, (HD44780_LINE1 + 0) ; +0001a0 deee rcall LCD_SetAddressDD ; Set DisplayData address to (0,1) + +0001a1 e0c0 ldi YL, LOW(SerialNumber) ; +0001a2 e0d1 ldi YH, HIGH(SerialNumber) ; Load to Y address of SerialNumber table +0001a3 e012 ldi r17,2 ; 8 digits to display + LoadLoop: +0001a4 930f push r16 +0001a5 2f0a mov r16, XL ; load to r16 byte from table + +0001a6 930f push r16 +0001a7 ef30 ldi r19,0xF0 +0001a8 2303 and r16,r19 +0001a9 d020 rcall bin2bcd8 +0001aa 9506 lsr r16 +0001ab 9506 lsr r16 +0001ac 9506 lsr r16 +0001ad 9506 lsr r16 +0001ae debe rcall LCD_WriteHexDigit ; display it on LCD in HEX +0001af 910f pop r16 +0001b0 d019 rcall bin2bcd8 +0001b1 e02f ldi r18,0x0F +0001b2 2302 and r16,r18 +0001b3 deb9 rcall LCD_WriteHexDigit ; display it on LCD in HEX + + + + + + +0001b4 2f02 mov r16, r18 ; load to r16 byte from table + +0001b5 930f push r16 +0001b6 ef30 ldi r19,0xF0 +0001b7 2303 and r16,r19 +0001b8 d011 rcall bin2bcd8 +0001b9 9506 lsr r16 +0001ba 9506 lsr r16 +0001bb 9506 lsr r16 +0001bc 9506 lsr r16 +0001bd deaf rcall LCD_WriteHexDigit ; display it on LCD in HEX +0001be 910f pop r16 +0001bf d00a rcall bin2bcd8 +0001c0 e02f ldi r18,0x0F +0001c1 2302 and r16,r18 +0001c2 deaa rcall LCD_WriteHexDigit ; display it on LCD in HEX +0001c3 0000 nop +0001c4 0000 nop +0001c5 0000 nop +0001c6 940c 0186 jmp MainLoop +0001c8 f6d9 brne LoadLoop ; if not zero, jump to LoadLoop +0001c9 cfbc rjmp MainLoop ; jump to MainLoop + ;------------------------------------------------------------------------------ + ; End of file + ;------------------------------------------------------------------------------ + + + + + ;======= Converting from HEX to BCD ====================================================https://evileg.com/en/post/19/ + ;***************************************************** + ;* "bin2BCD8" - 8-bit Binary to BCD conversion + ;* This subroutine converts an 8-bit number (temp) to a 2-digit + ;* i.e 0x15 becomes 0x21 + ;* result in temp + ;********************************************************** + ;.def tBCD = r21 ;add this to main asm file + ; + bin2bcd8: +0001ca 2755 clr r21 ;clear temp reg + bBCD8_1: +0001cb 500a subi r16,10 ;input = input - 10 +0001cc f010 brcs bBCD8_2 ;abort if carry set +0001cd 5f50 subi r21,-$10 ;tBCD = tBCD + 10 +0001ce cffc rjmp bBCD8_1 ;loop again + bBCD8_2: +0001cf 5f06 subi r16,-10 ;compensate extra subtraction +0001d0 0f05 add r16,r21 + + +RESOURCE USE INFORMATION +------------------------ + +Notice: +The register and instruction counts are symbol table hit counts, +and hence implicitly used resources are not counted, eg, the +'lpm' instruction without operands implicitly uses r0 and z, +none of which are counted. + +x,y,z are separate entities in the symbol table and are +counted separately from r26..r31 here. + +.dseg memory usage only counts static data declared with .byte + +"ATmega328P" register use summary: +x : 0 y : 6 z : 1 r0 : 1 r1 : 0 r2 : 0 r3 : 0 r4 : 0 +r5 : 0 r6 : 0 r7 : 0 r8 : 0 r9 : 0 r10: 0 r11: 0 r12: 0 +r13: 0 r14: 3 r15: 6 r16: 117 r17: 32 r18: 17 r19: 4 r20: 0 +r21: 4 r22: 1 r23: 0 r24: 0 r25: 0 r26: 21 r27: 21 r28: 4 +r29: 4 r30: 1 r31: 1 +Registers used: 17 out of 35 (48.6%) + +"ATmega328P" instruction use summary: +.lds : 0 .sts : 0 adc : 0 add : 5 adiw : 0 and : 6 +andi : 2 asr : 0 bclr : 0 bld : 0 brbc : 0 brbs : 0 +brcc : 3 brcs : 1 break : 0 breq : 2 brge : 0 brhc : 0 +brhs : 0 brid : 0 brie : 0 brlo : 1 brlt : 0 brmi : 0 +brne : 12 brpl : 0 brsh : 0 brtc : 0 brts : 7 brvc : 0 +brvs : 0 bset : 0 bst : 0 call : 0 cbi : 12 cbr : 0 +clc : 2 clh : 0 cli : 0 cln : 0 clr : 4 cls : 0 +clt : 2 clv : 0 clz : 0 com : 0 cp : 0 cpc : 0 +cpi : 7 cpse : 0 dec : 6 eor : 2 fmul : 0 fmuls : 0 +fmulsu: 0 icall : 0 ijmp : 0 in : 0 inc : 3 jmp : 2 +ld : 2 ldd : 0 ldi : 77 lds : 3 lpm : 1 lsl : 0 +lsr : 13 mov : 5 movw : 1 mul : 1 muls : 0 mulsu : 0 +neg : 0 nop : 3 or : 1 ori : 2 out : 1 pop : 18 +push : 19 rcall : 77 ret : 25 reti : 26 rjmp : 7 rol : 2 +ror : 9 sbc : 0 sbci : 0 sbi : 15 sbic : 1 sbis : 1 +sbiw : 1 sbr : 0 sbrc : 4 sbrs : 4 sec : 2 seh : 0 +sei : 0 sen : 0 ser : 0 ses : 0 set : 2 sev : 0 +sez : 0 sleep : 0 spm : 0 st : 4 std : 0 sts : 2 +sub : 2 subi : 3 swap : 3 tst : 0 wdr : 0 +Instructions used: 51 out of 113 (45.1%) + +"ATmega328P" memory use summary [bytes]: +Segment Begin End Code Data Used Size Use% +--------------------------------------------------------------- +[.cseg] 0x000000 0x0003a4 846 36 882 32768 2.7% +[.dseg] 0x000100 0x000111 0 17 17 2048 0.8% +[.eseg] 0x000000 0x000000 0 0 0 1024 0.0% + +Assembly complete, 0 errors, 3 warnings diff --git a/Debug/ASM18b20AvecLCD.map b/Debug/ASM18b20AvecLCD.map new file mode 100644 index 0000000..2c53c09 --- /dev/null +++ b/Debug/ASM18b20AvecLCD.map @@ -0,0 +1,772 @@ + +AVRASM ver. 2.2.7 C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm Sun Jun 10 03:42:22 2018 + + +EQU SIGNATURE_000 0000001e +EQU SIGNATURE_001 00000095 +EQU SIGNATURE_002 0000000f +EQU UDR0 000000c6 +EQU UBRR0L 000000c4 +EQU UBRR0H 000000c5 +EQU UCSR0C 000000c2 +EQU UCSR0B 000000c1 +EQU UCSR0A 000000c0 +EQU TWAMR 000000bd +EQU TWCR 000000bc +EQU TWDR 000000bb +EQU TWAR 000000ba +EQU TWSR 000000b9 +EQU TWBR 000000b8 +EQU ASSR 000000b6 +EQU OCR2B 000000b4 +EQU OCR2A 000000b3 +EQU TCNT2 000000b2 +EQU TCCR2B 000000b1 +EQU TCCR2A 000000b0 +EQU OCR1BL 0000008a +EQU OCR1BH 0000008b +EQU OCR1AL 00000088 +EQU OCR1AH 00000089 +EQU ICR1L 00000086 +EQU ICR1H 00000087 +EQU TCNT1L 00000084 +EQU TCNT1H 00000085 +EQU TCCR1C 00000082 +EQU TCCR1B 00000081 +EQU TCCR1A 00000080 +EQU DIDR1 0000007f +EQU DIDR0 0000007e +EQU ADMUX 0000007c +EQU ADCSRB 0000007b +EQU ADCSRA 0000007a +EQU ADCH 00000079 +EQU ADCL 00000078 +EQU TIMSK2 00000070 +EQU TIMSK1 0000006f +EQU TIMSK0 0000006e +EQU PCMSK1 0000006c +EQU PCMSK2 0000006d +EQU PCMSK0 0000006b +EQU EICRA 00000069 +EQU PCICR 00000068 +EQU OSCCAL 00000066 +EQU PRR 00000064 +EQU CLKPR 00000061 +EQU WDTCSR 00000060 +EQU SREG 0000003f +EQU SPL 0000003d +EQU SPH 0000003e +EQU SPMCSR 00000037 +EQU MCUCR 00000035 +EQU MCUSR 00000034 +EQU SMCR 00000033 +EQU ACSR 00000030 +EQU SPDR 0000002e +EQU SPSR 0000002d +EQU SPCR 0000002c +EQU GPIOR2 0000002b +EQU GPIOR1 0000002a +EQU OCR0B 00000028 +EQU OCR0A 00000027 +EQU TCNT0 00000026 +EQU TCCR0B 00000025 +EQU TCCR0A 00000024 +EQU GTCCR 00000023 +EQU EEARH 00000022 +EQU EEARL 00000021 +EQU EEDR 00000020 +EQU EECR 0000001f +EQU GPIOR0 0000001e +EQU EIMSK 0000001d +EQU EIFR 0000001c +EQU PCIFR 0000001b +EQU TIFR2 00000017 +EQU TIFR1 00000016 +EQU TIFR0 00000015 +EQU PORTD 0000000b +EQU DDRD 0000000a +EQU PIND 00000009 +EQU PORTC 00000008 +EQU DDRC 00000007 +EQU PINC 00000006 +EQU PORTB 00000005 +EQU DDRB 00000004 +EQU PINB 00000003 +EQU UDR0_0 00000000 +EQU UDR0_1 00000001 +EQU UDR0_2 00000002 +EQU UDR0_3 00000003 +EQU UDR0_4 00000004 +EQU UDR0_5 00000005 +EQU UDR0_6 00000006 +EQU UDR0_7 00000007 +EQU MPCM0 00000000 +EQU U2X0 00000001 +EQU UPE0 00000002 +EQU DOR0 00000003 +EQU FE0 00000004 +EQU UDRE0 00000005 +EQU TXC0 00000006 +EQU RXC0 00000007 +EQU TXB80 00000000 +EQU RXB80 00000001 +EQU UCSZ02 00000002 +EQU TXEN0 00000003 +EQU RXEN0 00000004 +EQU UDRIE0 00000005 +EQU TXCIE0 00000006 +EQU RXCIE0 00000007 +EQU UCPOL0 00000000 +EQU UCSZ00 00000001 +EQU UCPHA0 00000001 +EQU UCSZ01 00000002 +EQU UDORD0 00000002 +EQU USBS0 00000003 +EQU UPM00 00000004 +EQU UPM01 00000005 +EQU UMSEL00 00000006 +EQU UMSEL0 00000006 +EQU UMSEL01 00000007 +EQU UMSEL1 00000007 +EQU UBRR8 00000000 +EQU UBRR9 00000001 +EQU UBRR10 00000002 +EQU UBRR11 00000003 +EQU _UBRR0 00000000 +EQU _UBRR1 00000001 +EQU UBRR2 00000002 +EQU UBRR3 00000003 +EQU UBRR4 00000004 +EQU UBRR5 00000005 +EQU UBRR6 00000006 +EQU UBRR7 00000007 +EQU TWAM0 00000001 +EQU TWAMR0 00000001 +EQU TWAM1 00000002 +EQU TWAMR1 00000002 +EQU TWAM2 00000003 +EQU TWAMR2 00000003 +EQU TWAM3 00000004 +EQU TWAMR3 00000004 +EQU TWAM4 00000005 +EQU TWAMR4 00000005 +EQU TWAM5 00000006 +EQU TWAMR5 00000006 +EQU TWAM6 00000007 +EQU TWAMR6 00000007 +EQU TWBR0 00000000 +EQU TWBR1 00000001 +EQU TWBR2 00000002 +EQU TWBR3 00000003 +EQU TWBR4 00000004 +EQU TWBR5 00000005 +EQU TWBR6 00000006 +EQU TWBR7 00000007 +EQU TWIE 00000000 +EQU TWEN 00000002 +EQU TWWC 00000003 +EQU TWSTO 00000004 +EQU TWSTA 00000005 +EQU TWEA 00000006 +EQU TWINT 00000007 +EQU TWPS0 00000000 +EQU TWPS1 00000001 +EQU TWS3 00000003 +EQU TWS4 00000004 +EQU TWS5 00000005 +EQU TWS6 00000006 +EQU TWS7 00000007 +EQU TWD0 00000000 +EQU TWD1 00000001 +EQU TWD2 00000002 +EQU TWD3 00000003 +EQU TWD4 00000004 +EQU TWD5 00000005 +EQU TWD6 00000006 +EQU TWD7 00000007 +EQU TWGCE 00000000 +EQU TWA0 00000001 +EQU TWA1 00000002 +EQU TWA2 00000003 +EQU TWA3 00000004 +EQU TWA4 00000005 +EQU TWA5 00000006 +EQU TWA6 00000007 +EQU TOIE1 00000000 +EQU OCIE1A 00000001 +EQU OCIE1B 00000002 +EQU ICIE1 00000005 +EQU TOV1 00000000 +EQU OCF1A 00000001 +EQU OCF1B 00000002 +EQU ICF1 00000005 +EQU WGM10 00000000 +EQU WGM11 00000001 +EQU COM1B0 00000004 +EQU COM1B1 00000005 +EQU COM1A0 00000006 +EQU COM1A1 00000007 +EQU CS10 00000000 +EQU CS11 00000001 +EQU CS12 00000002 +EQU WGM12 00000003 +EQU WGM13 00000004 +EQU ICES1 00000006 +EQU ICNC1 00000007 +EQU FOC1B 00000006 +EQU FOC1A 00000007 +EQU PSRSYNC 00000000 +EQU TSM 00000007 +EQU TOIE2 00000000 +EQU TOIE2A 00000000 +EQU OCIE2A 00000001 +EQU OCIE2B 00000002 +EQU TOV2 00000000 +EQU OCF2A 00000001 +EQU OCF2B 00000002 +EQU WGM20 00000000 +EQU WGM21 00000001 +EQU COM2B0 00000004 +EQU COM2B1 00000005 +EQU COM2A0 00000006 +EQU COM2A1 00000007 +EQU CS20 00000000 +EQU CS21 00000001 +EQU CS22 00000002 +EQU WGM22 00000003 +EQU FOC2B 00000006 +EQU FOC2A 00000007 +EQU TCNT2_0 00000000 +EQU TCNT2_1 00000001 +EQU TCNT2_2 00000002 +EQU TCNT2_3 00000003 +EQU TCNT2_4 00000004 +EQU TCNT2_5 00000005 +EQU TCNT2_6 00000006 +EQU TCNT2_7 00000007 +EQU OCR2A_0 00000000 +EQU OCR2A_1 00000001 +EQU OCR2A_2 00000002 +EQU OCR2A_3 00000003 +EQU OCR2A_4 00000004 +EQU OCR2A_5 00000005 +EQU OCR2A_6 00000006 +EQU OCR2A_7 00000007 +EQU OCR2B_0 00000000 +EQU OCR2B_1 00000001 +EQU OCR2B_2 00000002 +EQU OCR2B_3 00000003 +EQU OCR2B_4 00000004 +EQU OCR2B_5 00000005 +EQU OCR2B_6 00000006 +EQU OCR2B_7 00000007 +EQU TCR2BUB 00000000 +EQU TCR2AUB 00000001 +EQU OCR2BUB 00000002 +EQU OCR2AUB 00000003 +EQU TCN2UB 00000004 +EQU AS2 00000005 +EQU EXCLK 00000006 +EQU PSRASY 00000001 +EQU PSR2 00000001 +EQU MUX0 00000000 +EQU MUX1 00000001 +EQU MUX2 00000002 +EQU MUX3 00000003 +EQU ADLAR 00000005 +EQU REFS0 00000006 +EQU REFS1 00000007 +EQU ADPS0 00000000 +EQU ADPS1 00000001 +EQU ADPS2 00000002 +EQU ADIE 00000003 +EQU ADIF 00000004 +EQU ADATE 00000005 +EQU ADSC 00000006 +EQU ADEN 00000007 +EQU ADTS0 00000000 +EQU ADTS1 00000001 +EQU ADTS2 00000002 +EQU ACME 00000006 +EQU ADCH0 00000000 +EQU ADCH1 00000001 +EQU ADCH2 00000002 +EQU ADCH3 00000003 +EQU ADCH4 00000004 +EQU ADCH5 00000005 +EQU ADCH6 00000006 +EQU ADCH7 00000007 +EQU ADCL0 00000000 +EQU ADCL1 00000001 +EQU ADCL2 00000002 +EQU ADCL3 00000003 +EQU ADCL4 00000004 +EQU ADCL5 00000005 +EQU ADCL6 00000006 +EQU ADCL7 00000007 +EQU ADC0D 00000000 +EQU ADC1D 00000001 +EQU ADC2D 00000002 +EQU ADC3D 00000003 +EQU ADC4D 00000004 +EQU ADC5D 00000005 +EQU ACIS0 00000000 +EQU ACIS1 00000001 +EQU ACIC 00000002 +EQU ACIE 00000003 +EQU ACI 00000004 +EQU ACO 00000005 +EQU ACBG 00000006 +EQU ACD 00000007 +EQU AIN0D 00000000 +EQU AIN1D 00000001 +EQU PORTB0 00000000 +EQU PB0 00000000 +EQU PORTB1 00000001 +EQU PB1 00000001 +EQU PORTB2 00000002 +EQU PB2 00000002 +EQU PORTB3 00000003 +EQU PB3 00000003 +EQU PORTB4 00000004 +EQU PB4 00000004 +EQU PORTB5 00000005 +EQU PB5 00000005 +EQU PORTB6 00000006 +EQU PB6 00000006 +EQU PORTB7 00000007 +EQU PB7 00000007 +EQU DDB0 00000000 +EQU DDB1 00000001 +EQU DDB2 00000002 +EQU DDB3 00000003 +EQU DDB4 00000004 +EQU DDB5 00000005 +EQU DDB6 00000006 +EQU DDB7 00000007 +EQU PINB0 00000000 +EQU PINB1 00000001 +EQU PINB2 00000002 +EQU PINB3 00000003 +EQU PINB4 00000004 +EQU PINB5 00000005 +EQU PINB6 00000006 +EQU PINB7 00000007 +EQU PORTC0 00000000 +EQU PC0 00000000 +EQU PORTC1 00000001 +EQU PC1 00000001 +EQU PORTC2 00000002 +EQU PC2 00000002 +EQU PORTC3 00000003 +EQU PC3 00000003 +EQU PORTC4 00000004 +EQU PC4 00000004 +EQU PORTC5 00000005 +EQU PC5 00000005 +EQU PORTC6 00000006 +EQU PC6 00000006 +EQU DDC0 00000000 +EQU DDC1 00000001 +EQU DDC2 00000002 +EQU DDC3 00000003 +EQU DDC4 00000004 +EQU DDC5 00000005 +EQU DDC6 00000006 +EQU PINC0 00000000 +EQU PINC1 00000001 +EQU PINC2 00000002 +EQU PINC3 00000003 +EQU PINC4 00000004 +EQU PINC5 00000005 +EQU PINC6 00000006 +EQU PORTD0 00000000 +EQU PD0 00000000 +EQU PORTD1 00000001 +EQU PD1 00000001 +EQU PORTD2 00000002 +EQU PD2 00000002 +EQU PORTD3 00000003 +EQU PD3 00000003 +EQU PORTD4 00000004 +EQU PD4 00000004 +EQU PORTD5 00000005 +EQU PD5 00000005 +EQU PORTD6 00000006 +EQU PD6 00000006 +EQU PORTD7 00000007 +EQU PD7 00000007 +EQU DDD0 00000000 +EQU DDD1 00000001 +EQU DDD2 00000002 +EQU DDD3 00000003 +EQU DDD4 00000004 +EQU DDD5 00000005 +EQU DDD6 00000006 +EQU DDD7 00000007 +EQU PIND0 00000000 +EQU PIND1 00000001 +EQU PIND2 00000002 +EQU PIND3 00000003 +EQU PIND4 00000004 +EQU PIND5 00000005 +EQU PIND6 00000006 +EQU PIND7 00000007 +EQU TOIE0 00000000 +EQU OCIE0A 00000001 +EQU OCIE0B 00000002 +EQU TOV0 00000000 +EQU OCF0A 00000001 +EQU OCF0B 00000002 +EQU WGM00 00000000 +EQU WGM01 00000001 +EQU COM0B0 00000004 +EQU COM0B1 00000005 +EQU COM0A0 00000006 +EQU COM0A1 00000007 +EQU CS00 00000000 +EQU CS01 00000001 +EQU CS02 00000002 +EQU WGM02 00000003 +EQU FOC0B 00000006 +EQU FOC0A 00000007 +EQU TCNT0_0 00000000 +EQU TCNT0_1 00000001 +EQU TCNT0_2 00000002 +EQU TCNT0_3 00000003 +EQU TCNT0_4 00000004 +EQU TCNT0_5 00000005 +EQU TCNT0_6 00000006 +EQU TCNT0_7 00000007 +EQU OCR0A_0 00000000 +EQU OCR0A_1 00000001 +EQU OCR0A_2 00000002 +EQU OCR0A_3 00000003 +EQU OCR0A_4 00000004 +EQU OCR0A_5 00000005 +EQU OCR0A_6 00000006 +EQU OCR0A_7 00000007 +EQU OCR0B_0 00000000 +EQU OCR0B_1 00000001 +EQU OCR0B_2 00000002 +EQU OCR0B_3 00000003 +EQU OCR0B_4 00000004 +EQU OCR0B_5 00000005 +EQU OCR0B_6 00000006 +EQU OCR0B_7 00000007 +EQU PSR10 00000000 +EQU ISC00 00000000 +EQU ISC01 00000001 +EQU ISC10 00000002 +EQU ISC11 00000003 +EQU INT0 00000000 +EQU INT1 00000001 +EQU INTF0 00000000 +EQU INTF1 00000001 +EQU PCIE0 00000000 +EQU PCIE1 00000001 +EQU PCIE2 00000002 +EQU PCINT16 00000000 +EQU PCINT17 00000001 +EQU PCINT18 00000002 +EQU PCINT19 00000003 +EQU PCINT20 00000004 +EQU PCINT21 00000005 +EQU PCINT22 00000006 +EQU PCINT23 00000007 +EQU PCINT8 00000000 +EQU PCINT9 00000001 +EQU PCINT10 00000002 +EQU PCINT11 00000003 +EQU PCINT12 00000004 +EQU PCINT13 00000005 +EQU PCINT14 00000006 +EQU PCINT0 00000000 +EQU PCINT1 00000001 +EQU PCINT2 00000002 +EQU PCINT3 00000003 +EQU PCINT4 00000004 +EQU PCINT5 00000005 +EQU PCINT6 00000006 +EQU PCINT7 00000007 +EQU PCIF0 00000000 +EQU PCIF1 00000001 +EQU PCIF2 00000002 +EQU SPDR0 00000000 +EQU SPDR1 00000001 +EQU SPDR2 00000002 +EQU SPDR3 00000003 +EQU SPDR4 00000004 +EQU SPDR5 00000005 +EQU SPDR6 00000006 +EQU SPDR7 00000007 +EQU SPI2X 00000000 +EQU WCOL 00000006 +EQU SPIF 00000007 +EQU SPR0 00000000 +EQU SPR1 00000001 +EQU CPHA 00000002 +EQU CPOL 00000003 +EQU MSTR 00000004 +EQU DORD 00000005 +EQU SPE 00000006 +EQU SPIE 00000007 +EQU WDP0 00000000 +EQU WDP1 00000001 +EQU WDP2 00000002 +EQU WDE 00000003 +EQU WDCE 00000004 +EQU WDP3 00000005 +EQU WDIE 00000006 +EQU WDIF 00000007 +EQU SREG_C 00000000 +EQU SREG_Z 00000001 +EQU SREG_N 00000002 +EQU SREG_V 00000003 +EQU SREG_S 00000004 +EQU SREG_H 00000005 +EQU SREG_T 00000006 +EQU SREG_I 00000007 +EQU CAL0 00000000 +EQU CAL1 00000001 +EQU CAL2 00000002 +EQU CAL3 00000003 +EQU CAL4 00000004 +EQU CAL5 00000005 +EQU CAL6 00000006 +EQU CAL7 00000007 +EQU CLKPS0 00000000 +EQU CLKPS1 00000001 +EQU CLKPS2 00000002 +EQU CLKPS3 00000003 +EQU CLKPCE 00000007 +EQU SELFPRGEN 00000000 +EQU SPMEN 00000000 +EQU PGERS 00000001 +EQU PGWRT 00000002 +EQU BLBSET 00000003 +EQU RWWSRE 00000004 +EQU SIGRD 00000005 +EQU RWWSB 00000006 +EQU SPMIE 00000007 +EQU IVCE 00000000 +EQU IVSEL 00000001 +EQU PUD 00000004 +EQU BODSE 00000005 +EQU BODS 00000006 +EQU PORF 00000000 +EQU EXTRF 00000001 +EQU EXTREF 00000001 +EQU BORF 00000002 +EQU WDRF 00000003 +EQU SE 00000000 +EQU SM0 00000001 +EQU SM1 00000002 +EQU SM2 00000003 +EQU GPIOR20 00000000 +EQU GPIOR21 00000001 +EQU GPIOR22 00000002 +EQU GPIOR23 00000003 +EQU GPIOR24 00000004 +EQU GPIOR25 00000005 +EQU GPIOR26 00000006 +EQU GPIOR27 00000007 +EQU GPIOR10 00000000 +EQU GPIOR11 00000001 +EQU GPIOR12 00000002 +EQU GPIOR13 00000003 +EQU GPIOR14 00000004 +EQU GPIOR15 00000005 +EQU GPIOR16 00000006 +EQU GPIOR17 00000007 +EQU GPIOR00 00000000 +EQU GPIOR01 00000001 +EQU GPIOR02 00000002 +EQU GPIOR03 00000003 +EQU GPIOR04 00000004 +EQU GPIOR05 00000005 +EQU GPIOR06 00000006 +EQU GPIOR07 00000007 +EQU PRADC 00000000 +EQU PRUSART0 00000001 +EQU PRSPI 00000002 +EQU PRTIM1 00000003 +EQU PRTIM0 00000005 +EQU PRTIM2 00000006 +EQU PRTWI 00000007 +EQU EEAR0 00000000 +EQU EEAR1 00000001 +EQU EEAR2 00000002 +EQU EEAR3 00000003 +EQU EEAR4 00000004 +EQU EEAR5 00000005 +EQU EEAR6 00000006 +EQU EEAR7 00000007 +EQU EEAR8 00000000 +EQU EEAR9 00000001 +EQU EEDR0 00000000 +EQU EEDR1 00000001 +EQU EEDR2 00000002 +EQU EEDR3 00000003 +EQU EEDR4 00000004 +EQU EEDR5 00000005 +EQU EEDR6 00000006 +EQU EEDR7 00000007 +EQU EERE 00000000 +EQU EEPE 00000001 +EQU EEMPE 00000002 +EQU EERIE 00000003 +EQU EEPM0 00000004 +EQU EEPM1 00000005 +EQU LB1 00000000 +EQU LB2 00000001 +EQU BLB01 00000002 +EQU BLB02 00000003 +EQU BLB11 00000004 +EQU BLB12 00000005 +EQU CKSEL0 00000000 +EQU CKSEL1 00000001 +EQU CKSEL2 00000002 +EQU CKSEL3 00000003 +EQU SUT0 00000004 +EQU SUT1 00000005 +EQU CKOUT 00000006 +EQU CKDIV8 00000007 +EQU BOOTRST 00000000 +EQU BOOTSZ0 00000001 +EQU BOOTSZ1 00000002 +EQU EESAVE 00000003 +EQU WDTON 00000004 +EQU SPIEN 00000005 +EQU DWEN 00000006 +EQU RSTDISBL 00000007 +EQU BODLEVEL0 00000000 +EQU BODLEVEL1 00000001 +EQU BODLEVEL2 00000002 +DEF XH r27 +DEF XL r26 +DEF YH r29 +DEF YL r28 +DEF ZH r31 +DEF ZL r30 +EQU FLASHEND 00003fff +EQU IOEND 000000ff +EQU SRAM_START 00000100 +EQU SRAM_SIZE 00000800 +EQU RAMEND 000008ff +EQU XRAMEND 00000000 +EQU E2END 000003ff +EQU EEPROMEND 000003ff +EQU EEADRBITS 0000000a +EQU NRWW_START_ADDR 00003800 +EQU NRWW_STOP_ADDR 00003fff +EQU RWW_START_ADDR 00000000 +EQU RWW_STOP_ADDR 000037ff +EQU PAGESIZE 00000040 +EQU FIRSTBOOTSTART 00003f00 +EQU SECONDBOOTSTART 00003e00 +EQU THIRDBOOTSTART 00003c00 +EQU FOURTHBOOTSTART 00003800 +EQU SMALLBOOTSTART 00003f00 +EQU LARGEBOOTSTART 00003800 +EQU INT0addr 00000002 +EQU INT1addr 00000004 +EQU PCI0addr 00000006 +EQU PCI1addr 00000008 +EQU PCI2addr 0000000a +EQU WDTaddr 0000000c +EQU OC2Aaddr 0000000e +EQU OC2Baddr 00000010 +EQU OVF2addr 00000012 +EQU ICP1addr 00000014 +EQU OC1Aaddr 00000016 +EQU OC1Baddr 00000018 +EQU OVF1addr 0000001a +EQU OC0Aaddr 0000001c +EQU OC0Baddr 0000001e +EQU OVF0addr 00000020 +EQU SPIaddr 00000022 +EQU URXCaddr 00000024 +EQU UDREaddr 00000026 +EQU UTXCaddr 00000028 +EQU ADCCaddr 0000002a +EQU ERDYaddr 0000002c +EQU ACIaddr 0000002e +EQU TWIaddr 00000030 +EQU SPMRaddr 00000032 +EQU INT_VECTORS_SIZE 00000034 +DSEG SerialNumber 00000100 +CSEG ProgramEntryPoint 00000171 +EQU LCD_PORT 0000000b +EQU LCD_DDR 0000000a +EQU LCD_PIN 00000009 +EQU LCD_D4 00000005 +EQU LCD_D5 00000004 +EQU LCD_D6 00000003 +EQU LCD_D7 00000002 +EQU LCD_RS 00000006 +EQU LCD_EN 00000007 +DEF drem8u r15 +DEF dres8u r16 +DEF dd8u r16 +DEF dv8u r17 +DEF dcnt8u r18 +CSEG div8u 00000033 +CSEG d8u_1 00000035 +CSEG d8u_2 00000039 +CSEG d8u_3 0000003f +CSEG LCD_WriteNibble 00000041 +CSEG LCD_WriteData 00000054 +CSEG Wait4xCycles 000000b5 +CSEG LCD_WriteCommand 0000005e +CSEG WaitMiliseconds 000000b8 +CSEG LCD_WriteString 00000067 +CSEG exit 0000006c +CSEG LCD_WriteHexDigit 0000006d +CSEG Num 00000073 +CSEG LCD_WriteHex8 00000077 +CSEG LCD_WriteDecimal 00000081 +CSEG LCD_WriteDecimalLoop 00000082 +CSEG LCD_WriteDecimalLoop2 00000088 +CSEG LCD_SetAddressDD 0000008f +CSEG LCD_SetAddressCG 00000092 +CSEG LCD_Init 00000095 +CSEG InitLoop 000000a0 +CSEG WaitMsLoop 000000b9 +EQU OW_PORT 00000005 +EQU OW_PIN 00000003 +EQU OW_DDR 00000004 +EQU OW_DQ 00000000 +DEF OWCount r17 +DSEG TempWord 00000108 +DSEG TRegister 0000010b +DSEG ConfigRegister 0000010e +CSEG OWReset 000000c3 +CSEG OWWriteBit 000000d3 +CSEG OWWriteZero 000000d7 +CSEG OWWriteOne 000000d9 +CSEG OWWriteByte 000000e0 +CSEG OWWriteLoop 000000e2 +CSEG OWReadBit 000000e9 +CSEG OWReadBitEnd 000000fa +CSEG OWReadByte 000000fb +CSEG OWReadLoop 000000fd +CSEG MainReadTemp 00000104 +CSEG TempRequest 00000117 +CSEG ConvertTempForLCD 00000120 +DSEG _crc 00000110 +CSEG CRC8Update 0000013b +CSEG CRC8L 00000140 +CSEG CRC8zero 00000149 +CSEG CRC8Init 00000156 +CSEG GetCRC8 0000015c +CSEG Text1 0000015f +CSEG Text2 00000167 +CSEG Tp 0000016f +CSEG ConfigResolTo10Bits 0000017b +CSEG MainLoop 00000186 +CSEG LoadLoop 000001a4 +CSEG StoreLoop 00000197 +CSEG bin2bcd8 000001ca +CSEG bBCD8_1 000001cb +CSEG bBCD8_2 000001cf diff --git a/Debug/ASM18b20AvecLCD.obj b/Debug/ASM18b20AvecLCD.obj new file mode 100644 index 0000000000000000000000000000000000000000..e882f0a840c2c95436ef42e29ee0217836d2b532 GIT binary patch literal 4919 zcmciFXLMCn8piRxb4d0Dk0z_X}!)D8YjuTJR94EvN$?7CZuC1hL>z!DFDVpgyQ4Xb2hz9tVvC zjlmOwcn~LO0ultxKvO{r&@AdsxVQP{Zo_a@g_ag|IB-?aGT12GJ4LIT6~k3^S`vf4 zaPK&+YcooY(B8CJ-T|K}z7?*bX=z)?@Yg}JE{X1RR4gZo&|%i zZFW>A;4c~IsLo)B%-jVGEn?;#V3^F@6AYJ`dw~>d9hD45$jr}!RQrvidV@5VXZnEj zlHQK$3r5O>{lKU|xT6Mv(Fxq)V32XWnxp(+jBIrX7+d_CqlSV^88sYaB~)^heEj3C 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C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\Debug + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.2.150\avrasm\inc + C:\Program Files (x86)\Atmel\Studio\7.0\toolchain\avr8\avrassembler\Include + + + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm + + C:/Program Files (x86)\Atmel\Studio\7.0\Packs\atmel\ATmega_DFP\1.2.150\avrasm\inc\m328pdef.inc + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\vectors.asm + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.inc + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\div8u.asm + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\wait.asm + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\crc8.asm + + + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\Debug\ASM18b20AvecLCD.obj + + + ASM18b20AvecLCD.hex + + + ASM18b20AvecLCD.map + ASM18b20AvecLCD.lss + + + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm25 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm51 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\div8u.asm12 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\div8u.asm15 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\div8u.asm20 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\div8u.asm27 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm33 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm61 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\wait.asm24 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm76 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\wait.asm32 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm89 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm95 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm100 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm107 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm115 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm130 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm132 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm140 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm151 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm158 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm165 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\hd44780.asm181 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\wait.asm34 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm26 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm27 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm28 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm37 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm63 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm68 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm71 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm83 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm86 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm97 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm115 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm120 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm123 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm134 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm156 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\1-wire.asm168 + <_crc>C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\crc8.asm13 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\crc8.asm21 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\crc8.asm28 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\crc8.asm37 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\crc8.asm53 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\crc8.asm62 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm42 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm44 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm46 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm70 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm85 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm126 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm109 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm188 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm190 + C:\Users\adrie\Nextcloud\iset\2IS\2IS\ASM JR\ASM18b20AvecLCD\ASM18b20AvecLCD\ASM18b20AvecLCD\main.asm195 + + diff --git a/crc8.asm b/crc8.asm new file mode 100644 index 0000000..b5c6a02 --- /dev/null +++ b/crc8.asm @@ -0,0 +1,67 @@ +;------------------------------------------------------------------------------ +; CRC8 computing functions +; based on Application Note 27 from Dallas Semiconductor +; http://avr-mcu.dxp.pl +; e-mail: radek@dxp.pl +; (c) Radoslaw Kwiecien +;------------------------------------------------------------------------------ + +;------------------------------------------------------------------------------ +; Data segment +;------------------------------------------------------------------------------ +.dseg +_crc : .byte 1 +;------------------------------------------------------------------------------ +; Code segment +;------------------------------------------------------------------------------ +.cseg +;------------------------------------------------------------------------------ +; Update crc value +;------------------------------------------------------------------------------ +CRC8Update: + push r16 + push r17 + push r18 + push r16 + + ldi r17, 8 +CRC8L: + lds r18, _crc + eor r16, r18 + ror r16 + lds r16, _crc + brcc CRC8zero + ldi r18, 0x18 + eor r16, r18 + +CRC8zero: + ror r16 + sts _crc, r16 + pop r16 + lsr r16 + push r16 + dec r17 + brne CRC8L + pop r16 + pop r18 + pop r17 + pop r16 + ret +;------------------------------------------------------------------------------ +; Clear crc value +;------------------------------------------------------------------------------ +CRC8Init: + push r16 + ldi r16,0 + sts _crc, r16 + pop r16 + ret +;------------------------------------------------------------------------------ +; Copy crc value to r16 +;------------------------------------------------------------------------------ +GetCRC8: + lds r16, _crc + ret +;------------------------------------------------------------------------------ +; End of crc8.asm file +;------------------------------------------------------------------------------ diff --git a/div8u.asm b/div8u.asm new file mode 100644 index 0000000..5a75981 --- /dev/null +++ b/div8u.asm @@ -0,0 +1,29 @@ +.cseg +;***** Subroutine Register Variables + +.def drem8u =r15 ;remainder +.def dres8u =r16 ;result +.def dd8u =r16 ;dividend +.def dv8u =r17 ;divisor +.def dcnt8u =r18 ;loop counter + +;***** Code + +div8u: + sub drem8u,drem8u ; clear remainder and carry + ldi dcnt8u,9 ; init loop counter +d8u_1: + rol dd8u ; shift left dividend + dec dcnt8u ; decrement counter + brne d8u_2 ; if done + ret ; return +d8u_2: + rol drem8u ; shift dividend into remainder + sub drem8u,dv8u ; remainder = remainder - divisor + brcc d8u_3 ; if result negative + add drem8u,dv8u ; restore remainder + clc ; clear carry to be shifted into result + rjmp d8u_1 ; else +d8u_3: + sec ; set carry to be shifted into result + rjmp d8u_1 diff --git a/hd44780.asm b/hd44780.asm new file mode 100644 index 0000000..e90ebf9 --- /dev/null +++ b/hd44780.asm @@ -0,0 +1,215 @@ +;------------------------------------------------------------------------------ +; HD44780 LCD Assembly driver +; http://avr-mcu.dxp.pl +; e-mail : radek@dxp.pl +; (c) Radoslaw Kwiecien +;------------------------------------------------------------------------------ +.include "hd44780.inc" + +.equ LCD_PORT = PORTD +.equ LCD_DDR = DDRD +.equ LCD_PIN = PIND + +.equ LCD_D4 = 5 +.equ LCD_D5 = 4 +.equ LCD_D6 = 3 +.equ LCD_D7 = 2 + +.equ LCD_RS = 6 +.equ LCD_EN = 7 + +;------------------------------------------------------------------------------ +; Data segment +;------------------------------------------------------------------------------ +.dseg +;------------------------------------------------------------------------------ +; Code segment +;------------------------------------------------------------------------------ +.cseg +#include "div8u.asm" +;------------------------------------------------------------------------------ +; Write half byte to LCD +;------------------------------------------------------------------------------ +LCD_WriteNibble: + sbi LCD_PORT, LCD_EN + + sbrs r16, 0 + cbi LCD_PORT, LCD_D4 + sbrc r16, 0 + sbi LCD_PORT, LCD_D4 + + sbrs r16, 1 + cbi LCD_PORT, LCD_D5 + sbrc r16, 1 + sbi LCD_PORT, LCD_D5 + + sbrs r16, 2 + cbi LCD_PORT, LCD_D6 + sbrc r16, 2 + sbi LCD_PORT, LCD_D6 + + sbrs r16, 3 + cbi LCD_PORT, LCD_D7 + sbrc r16, 3 + sbi LCD_PORT, LCD_D7 + + cbi LCD_PORT, LCD_EN + ret +;------------------------------------------------------------------------------ +; Write data byte to LCD +;------------------------------------------------------------------------------ +LCD_WriteData: + sbi LCD_PORT, LCD_RS + push r16 + swap r16 + rcall LCD_WriteNibble + pop r16 + rcall LCD_WriteNibble + + clr XH + ldi XL,250 + rcall Wait4xCycles + ret +;------------------------------------------------------------------------------ +; Write command byte to LCD +;------------------------------------------------------------------------------ +LCD_WriteCommand: + cbi LCD_PORT, LCD_RS + push r16 + swap r16 + rcall LCD_WriteNibble + pop r16 + rcall LCD_WriteNibble + ldi r16,2 + rcall WaitMiliseconds + ret +;------------------------------------------------------------------------------ +; Write string (from program memory) +;------------------------------------------------------------------------------ +LCD_WriteString: + lpm r16, Z+ + cpi r16, 0 + breq exit + rcall LCD_WriteData + rjmp LCD_WriteString +exit: + ret +;------------------------------------------------------------------------------ +; Display one digit in HEX code +;------------------------------------------------------------------------------ +LCD_WriteHexDigit: + cpi r16,10 + brlo Num + ldi r17,'7' + add r16,r17 + rcall LCD_WriteData + ret +Num: + ldi r17,'0' + add r16,r17 + rcall LCD_WriteData + ret +;------------------------------------------------------------------------------ +; Display 8-byte hex value of r16 +;------------------------------------------------------------------------------ +LCD_WriteHex8: + push r17 + push r16 + swap r16 + andi r16,0x0F + rcall LCD_WriteHexDigit + + pop r16 + andi r16,0x0F + rcall LCD_WriteHexDigit + pop r17 + ret +;------------------------------------------------------------------------------ +; Display decimal value of r16 +;------------------------------------------------------------------------------ +LCD_WriteDecimal: + clr r14 +LCD_WriteDecimalLoop: + ldi r17,10 + rcall div8u + inc r14 + push r15 + cpi r16,0 + brne LCD_WriteDecimalLoop + +LCD_WriteDecimalLoop2: + ldi r17,'0' + pop r16 + add r16,r17 + rcall LCD_WriteData + dec r14 + brne LCD_WriteDecimalLoop2 + ret +;------------------------------------------------------------------------------ +; Set address in Display Data RAM +;------------------------------------------------------------------------------ +LCD_SetAddressDD: + ori r16, HD44780_DDRAM_SET + rcall LCD_WriteCommand + ret +;------------------------------------------------------------------------------ +; Set address in Character Generator RAM +;------------------------------------------------------------------------------ +LCD_SetAddressCG: + ori r16, HD44780_CGRAM_SET + rcall LCD_WriteCommand + ret +;------------------------------------------------------------------------------ +; Initialization of LCD +;------------------------------------------------------------------------------ +LCD_Init: + sbi LCD_DDR, LCD_D4 + sbi LCD_DDR, LCD_D5 + sbi LCD_DDR, LCD_D6 + sbi LCD_DDR, LCD_D7 + + sbi LCD_DDR, LCD_RS + sbi LCD_DDR, LCD_EN + + cbi LCD_PORT, LCD_RS + cbi LCD_PORT, LCD_EN + + ldi r16, 100 + rcall WaitMiliseconds + + ldi r17, 3 +InitLoop: + ldi r16, 0x03 + rcall LCD_WriteNibble + ldi r16, 5 + rcall WaitMiliseconds + dec r17 + brne InitLoop + + ldi r16, 0x02 + rcall LCD_WriteNibble + + ldi r16, 1 + rcall WaitMiliseconds + + ldi r16, HD44780_FUNCTION_SET | HD44780_FONT5x7 | HD44780_TWO_LINE | HD44780_4_BIT + rcall LCD_WriteCommand + + ldi r16, HD44780_DISPLAY_ONOFF | HD44780_DISPLAY_OFF + rcall LCD_WriteCommand + + ldi r16, HD44780_CLEAR + rcall LCD_WriteCommand + + ldi r16, HD44780_ENTRY_MODE |HD44780_EM_SHIFT_CURSOR | HD44780_EM_INCREMENT + rcall LCD_WriteCommand + + ldi r16, HD44780_DISPLAY_ONOFF | HD44780_DISPLAY_ON | HD44780_CURSOR_OFF | HD44780_CURSOR_NOBLINK + rcall LCD_WriteCommand + + ret +;------------------------------------------------------------------------------ +; End of file +;------------------------------------------------------------------------------ + + diff --git a/hd44780.inc b/hd44780.inc new file mode 100644 index 0000000..5be1d80 --- /dev/null +++ b/hd44780.inc @@ -0,0 +1,38 @@ +#define HD44780_CLEAR 0x01 + +#define HD44780_HOME 0x02 + +#define HD44780_ENTRY_MODE 0x04 + #define HD44780_EM_SHIFT_CURSOR 0 + #define HD44780_EM_SHIFT_DISPLAY 1 + #define HD44780_EM_DECREMENT 0 + #define HD44780_EM_INCREMENT 2 + +#define HD44780_DISPLAY_ONOFF 0x08 + #define HD44780_DISPLAY_OFF 0 + #define HD44780_DISPLAY_ON 4 + #define HD44780_CURSOR_OFF 0 + #define HD44780_CURSOR_ON 2 + #define HD44780_CURSOR_NOBLINK 0 + #define HD44780_CURSOR_BLINK 1 + +#define HD44780_DISPLAY_CURSOR_SHIFT 0x10 + #define HD44780_SHIFT_CURSOR 0 + #define HD44780_SHIFT_DISPLAY 8 + #define HD44780_SHIFT_LEFT 0 + #define HD44780_SHIFT_RIGHT 4 + +#define HD44780_FUNCTION_SET 0x20 + #define HD44780_FONT5x7 0 + #define HD44780_FONT5x10 4 + #define HD44780_ONE_LINE 0 + #define HD44780_TWO_LINE 8 + #define HD44780_4_BIT 0 + #define HD44780_8_BIT 16 + +#define HD44780_CGRAM_SET 0x40 + +#define HD44780_DDRAM_SET 0x80 + +#define HD44780_LINE0 0x00 +#define HD44780_LINE1 0x40 diff --git a/ibutton-numberSample/1-wire.asm b/ibutton-numberSample/1-wire.asm new file mode 100644 index 0000000..1df08df --- /dev/null +++ b/ibutton-numberSample/1-wire.asm @@ -0,0 +1,113 @@ +;------------------------------------------------------------------------------ +; +;------------------------------------------------------------------------------ +.equ OW_PORT = PORTD +.equ OW_PIN = PIND +.equ OW_DDR = DDRD +.equ OW_DQ = PD6 + +.def OWCount = r17 +;------------------------------------------------------------------------------ +; +;------------------------------------------------------------------------------ +.cseg +;------------------------------------------------------------------------------ +; Output : T - presence bit +;------------------------------------------------------------------------------ +OWReset: + cbi OW_PORT,OW_DQ + sbi OW_DDR,OW_DQ + + ldi XH, HIGH(DVUS(470)) + ldi XL, LOW(DVUS(470)) + rcall Wait4xCycles + + cbi OW_DDR,OW_DQ + + ldi XH, HIGH(DVUS(70)) + ldi XL, LOW(DVUS(70)) + rcall Wait4xCycles + + set + sbis OW_PIN,OW_DQ + clt + + ldi XH, HIGH(DVUS(240)) + ldi XL, LOW(DVUS(240)) + rcall Wait4xCycles + + ret +;------------------------------------------------------------------------------ +; Input : C - bit to write +;------------------------------------------------------------------------------ +OWWriteBit: + brcc OWWriteZero + ldi XH, HIGH(DVUS(1)) + ldi XL, LOW(DVUS(1)) + rjmp OWWriteOne +OWWriteZero: + ldi XH, HIGH(DVUS(120)) + ldi XL, LOW(DVUS(120)) +OWWriteOne: + sbi OW_DDR, OW_DQ + rcall Wait4xCycles + cbi OW_DDR, OW_DQ + + ldi XH, HIGH(DVUS(60)) + ldi XL, LOW(DVUS(60)) + rcall Wait4xCycles + ret +;------------------------------------------------------------------------------ +; Input : r16 - byte to write +;------------------------------------------------------------------------------ +OWWriteByte: + push OWCount + ldi OWCount,0 +OWWriteLoop: + ror r16 + rcall OWWriteBit + inc OWCount + cpi OWCount,8 + brne OWWriteLoop + pop OWCount + ret +;------------------------------------------------------------------------------ +; Output : C - bit from slave +;------------------------------------------------------------------------------ +OWReadBit: + ldi XH, HIGH(DVUS(1)) + ldi XL, LOW(DVUS(1)) + sbi OW_DDR, OW_DQ + rcall Wait4xCycles + cbi OW_DDR, OW_DQ + ldi XH, HIGH(DVUS(5)) + ldi XL, LOW(DVUS(5)) + rcall Wait4xCycles + clt + sbic OW_PIN,OW_DQ + set + ldi XH, HIGH(DVUS(50)) + ldi XL, LOW(DVUS(50)) + rcall Wait4xCycles + sec + brts OWReadBitEnd + clc +OWReadBitEnd: + ret +;------------------------------------------------------------------------------ +; Output : r16 - byte from slave +;------------------------------------------------------------------------------ +OWReadByte: + push OWCount + ldi OWCount,0 +OWReadLoop: + rcall OWReadBit + ror r16 + inc OWCount + cpi OWCount,8 + brne OWReadLoop + pop OWCount + ret +;------------------------------------------------------------------------------ +; +;------------------------------------------------------------------------------ diff --git a/ibutton-numberSample/AvrBuild.bat b/ibutton-numberSample/AvrBuild.bat new file mode 100644 index 0000000..bb20438 --- /dev/null +++ b/ibutton-numberSample/AvrBuild.bat @@ -0,0 +1,2 @@ +@ECHO OFF +"C:\Program Files (x86)\Atmel\AVR Tools\AvrAssembler2\avrasm2.exe" -S "F:\WORK\uK\AVR\Projects\ibutton-number-read\labels.tmp" -fI -W+ie -o "F:\WORK\uK\AVR\Projects\ibutton-number-read\ibutton-number-read.hex" -d "F:\WORK\uK\AVR\Projects\ibutton-number-read\ibutton-number-read.obj" -e "F:\WORK\uK\AVR\Projects\ibutton-number-read\ibutton-number-read.eep" -m "F:\WORK\uK\AVR\Projects\ibutton-number-read\ibutton-number-read.map" "F:\WORK\uK\AVR\Projects\ibutton-number-read\main.asm" diff --git a/ibutton-numberSample/crc8.asm b/ibutton-numberSample/crc8.asm new file mode 100644 index 0000000..b5c6a02 --- /dev/null +++ b/ibutton-numberSample/crc8.asm @@ -0,0 +1,67 @@ +;------------------------------------------------------------------------------ +; CRC8 computing functions +; based on Application Note 27 from Dallas Semiconductor +; http://avr-mcu.dxp.pl +; e-mail: radek@dxp.pl +; (c) Radoslaw Kwiecien +;------------------------------------------------------------------------------ + +;------------------------------------------------------------------------------ +; Data segment +;------------------------------------------------------------------------------ +.dseg +_crc : .byte 1 +;------------------------------------------------------------------------------ +; Code segment +;------------------------------------------------------------------------------ +.cseg +;------------------------------------------------------------------------------ +; Update crc value +;------------------------------------------------------------------------------ +CRC8Update: + push r16 + push r17 + push r18 + push r16 + + ldi r17, 8 +CRC8L: + lds r18, _crc + eor r16, r18 + ror r16 + lds r16, _crc + brcc CRC8zero + ldi r18, 0x18 + eor r16, r18 + +CRC8zero: + ror r16 + sts _crc, r16 + pop r16 + lsr r16 + push r16 + dec r17 + brne CRC8L + pop r16 + pop r18 + pop r17 + pop r16 + ret +;------------------------------------------------------------------------------ +; Clear crc value +;------------------------------------------------------------------------------ +CRC8Init: + push r16 + ldi r16,0 + sts _crc, r16 + pop r16 + ret +;------------------------------------------------------------------------------ +; Copy crc value to r16 +;------------------------------------------------------------------------------ +GetCRC8: + lds r16, _crc + ret +;------------------------------------------------------------------------------ +; End of crc8.asm file +;------------------------------------------------------------------------------ diff --git a/ibutton-numberSample/div8u.asm b/ibutton-numberSample/div8u.asm new file mode 100644 index 0000000..5a75981 --- /dev/null +++ b/ibutton-numberSample/div8u.asm @@ -0,0 +1,29 @@ +.cseg +;***** Subroutine Register Variables + +.def drem8u =r15 ;remainder +.def dres8u =r16 ;result +.def dd8u =r16 ;dividend +.def dv8u =r17 ;divisor +.def dcnt8u =r18 ;loop counter + +;***** Code + +div8u: + sub drem8u,drem8u ; clear remainder and carry + ldi dcnt8u,9 ; init loop counter +d8u_1: + rol dd8u ; shift left dividend + dec dcnt8u ; decrement counter + brne d8u_2 ; if done + ret ; return +d8u_2: + rol drem8u ; shift dividend into remainder + sub drem8u,dv8u ; remainder = remainder - divisor + brcc d8u_3 ; if result negative + add drem8u,dv8u ; restore remainder + clc ; clear carry to be shifted into result + rjmp d8u_1 ; else +d8u_3: + sec ; set carry to be shifted into result + rjmp d8u_1 diff --git a/ibutton-numberSample/hd44780.asm b/ibutton-numberSample/hd44780.asm new file mode 100644 index 0000000..0e19f7a --- /dev/null +++ b/ibutton-numberSample/hd44780.asm @@ -0,0 +1,216 @@ +;------------------------------------------------------------------------------ +; HD44780 LCD Assembly driver +; http://avr-mcu.dxp.pl +; e-mail : radek@dxp.pl +; (c) Radoslaw Kwiecien +;------------------------------------------------------------------------------ +.include "tn2313def.inc" +.include "hd44780.inc" + +.equ LCD_PORT = PORTB +.equ LCD_DDR = DDRB +.equ LCD_PIN = PINB + +.equ LCD_D4 = 0 +.equ LCD_D5 = 1 +.equ LCD_D6 = 2 +.equ LCD_D7 = 3 + +.equ LCD_RS = 4 +.equ LCD_EN = 6 + +;------------------------------------------------------------------------------ +; Data segment +;------------------------------------------------------------------------------ +.dseg +;------------------------------------------------------------------------------ +; Code segment +;------------------------------------------------------------------------------ +.cseg +#include "div8u.asm" +;------------------------------------------------------------------------------ +; Write half byte to LCD +;------------------------------------------------------------------------------ +LCD_WriteNibble: + sbi LCD_PORT, LCD_EN + + sbrs r16, 0 + cbi LCD_PORT, LCD_D4 + sbrc r16, 0 + sbi LCD_PORT, LCD_D4 + + sbrs r16, 1 + cbi LCD_PORT, LCD_D5 + sbrc r16, 1 + sbi LCD_PORT, LCD_D5 + + sbrs r16, 2 + cbi LCD_PORT, LCD_D6 + sbrc r16, 2 + sbi LCD_PORT, LCD_D6 + + sbrs r16, 3 + cbi LCD_PORT, LCD_D7 + sbrc r16, 3 + sbi LCD_PORT, LCD_D7 + + cbi LCD_PORT, LCD_EN + ret +;------------------------------------------------------------------------------ +; Write data byte to LCD +;------------------------------------------------------------------------------ +LCD_WriteData: + sbi LCD_PORT, LCD_RS + push r16 + swap r16 + rcall LCD_WriteNibble + pop r16 + rcall LCD_WriteNibble + + clr XH + ldi XL,250 + rcall Wait4xCycles + ret +;------------------------------------------------------------------------------ +; Write command byte to LCD +;------------------------------------------------------------------------------ +LCD_WriteCommand: + cbi LCD_PORT, LCD_RS + push r16 + swap r16 + rcall LCD_WriteNibble + pop r16 + rcall LCD_WriteNibble + ldi r16,2 + rcall WaitMiliseconds + ret +;------------------------------------------------------------------------------ +; Write string (from program memory) +;------------------------------------------------------------------------------ +LCD_WriteString: + lpm r16, Z+ + cpi r16, 0 + breq exit + rcall LCD_WriteData + rjmp LCD_WriteString +exit: + ret +;------------------------------------------------------------------------------ +; Display one digit in HEX code +;------------------------------------------------------------------------------ +LCD_WriteHexDigit: + cpi r16,10 + brlo Num + ldi r17,'7' + add r16,r17 + rcall LCD_WriteData + ret +Num: + ldi r17,'0' + add r16,r17 + rcall LCD_WriteData + ret +;------------------------------------------------------------------------------ +; Display 8-byte hex value of r16 +;------------------------------------------------------------------------------ +LCD_WriteHex8: + push r17 + push r16 + swap r16 + andi r16,0x0F + rcall LCD_WriteHexDigit + + pop r16 + andi r16,0x0F + rcall LCD_WriteHexDigit + pop r17 + ret +;------------------------------------------------------------------------------ +; Display decimal value of r16 +;------------------------------------------------------------------------------ +LCD_WriteDecimal: + clr r14 +LCD_WriteDecimalLoop: + ldi r17,10 + rcall div8u + inc r14 + push r15 + cpi r16,0 + brne LCD_WriteDecimalLoop + +LCD_WriteDecimalLoop2: + ldi r17,'0' + pop r16 + add r16,r17 + rcall LCD_WriteData + dec r14 + brne LCD_WriteDecimalLoop2 + ret +;------------------------------------------------------------------------------ +; Set address in Display Data RAM +;------------------------------------------------------------------------------ +LCD_SetAddressDD: + ori r16, HD44780_DDRAM_SET + rcall LCD_WriteCommand + ret +;------------------------------------------------------------------------------ +; Set address in Character Generator RAM +;------------------------------------------------------------------------------ +LCD_SetAddressCG: + ori r16, HD44780_CGRAM_SET + rcall LCD_WriteCommand + ret +;------------------------------------------------------------------------------ +; Initialization of LCD +;------------------------------------------------------------------------------ +LCD_Init: + sbi LCD_DDR, LCD_D4 + sbi LCD_DDR, LCD_D5 + sbi LCD_DDR, LCD_D6 + sbi LCD_DDR, LCD_D7 + + sbi LCD_DDR, LCD_RS + sbi LCD_DDR, LCD_EN + + cbi LCD_PORT, LCD_RS + cbi LCD_PORT, LCD_EN + + ldi r16, 100 + rcall WaitMiliseconds + + ldi r17, 3 +InitLoop: + ldi r16, 0x03 + rcall LCD_WriteNibble + ldi r16, 5 + rcall WaitMiliseconds + dec r17 + brne InitLoop + + ldi r16, 0x02 + rcall LCD_WriteNibble + + ldi r16, 1 + rcall WaitMiliseconds + + ldi r16, HD44780_FUNCTION_SET | HD44780_FONT5x7 | HD44780_TWO_LINE | HD44780_4_BIT + rcall LCD_WriteCommand + + ldi r16, HD44780_DISPLAY_ONOFF | HD44780_DISPLAY_OFF + rcall LCD_WriteCommand + + ldi r16, HD44780_CLEAR + rcall LCD_WriteCommand + + ldi r16, HD44780_ENTRY_MODE |HD44780_EM_SHIFT_CURSOR | HD44780_EM_INCREMENT + rcall LCD_WriteCommand + + ldi r16, HD44780_DISPLAY_ONOFF | HD44780_DISPLAY_ON | HD44780_CURSOR_OFF | HD44780_CURSOR_NOBLINK + rcall LCD_WriteCommand + + ret +;------------------------------------------------------------------------------ +; End of file +;------------------------------------------------------------------------------ + + diff --git a/ibutton-numberSample/hd44780.inc b/ibutton-numberSample/hd44780.inc new file mode 100644 index 0000000..5be1d80 --- /dev/null +++ b/ibutton-numberSample/hd44780.inc @@ -0,0 +1,38 @@ +#define HD44780_CLEAR 0x01 + +#define HD44780_HOME 0x02 + +#define HD44780_ENTRY_MODE 0x04 + #define HD44780_EM_SHIFT_CURSOR 0 + #define HD44780_EM_SHIFT_DISPLAY 1 + #define HD44780_EM_DECREMENT 0 + #define HD44780_EM_INCREMENT 2 + +#define HD44780_DISPLAY_ONOFF 0x08 + #define HD44780_DISPLAY_OFF 0 + #define HD44780_DISPLAY_ON 4 + #define HD44780_CURSOR_OFF 0 + #define HD44780_CURSOR_ON 2 + #define HD44780_CURSOR_NOBLINK 0 + #define HD44780_CURSOR_BLINK 1 + +#define HD44780_DISPLAY_CURSOR_SHIFT 0x10 + #define HD44780_SHIFT_CURSOR 0 + #define HD44780_SHIFT_DISPLAY 8 + #define HD44780_SHIFT_LEFT 0 + #define HD44780_SHIFT_RIGHT 4 + +#define HD44780_FUNCTION_SET 0x20 + #define HD44780_FONT5x7 0 + #define HD44780_FONT5x10 4 + #define HD44780_ONE_LINE 0 + #define HD44780_TWO_LINE 8 + #define HD44780_4_BIT 0 + #define HD44780_8_BIT 16 + +#define HD44780_CGRAM_SET 0x40 + +#define HD44780_DDRAM_SET 0x80 + +#define HD44780_LINE0 0x00 +#define HD44780_LINE1 0x40 diff --git a/ibutton-numberSample/ibutton-number-read.aps b/ibutton-numberSample/ibutton-number-read.aps new file mode 100644 index 0000000..0574cfa --- /dev/null +++ b/ibutton-numberSample/ibutton-number-read.aps @@ -0,0 +1 @@ +ibutton-number-read04-Dec-2011 17:57:4706-Dec-2011 17:56:07208004-Dec-2011 17:57:4744, 15, 0, 623Atmel AVR Assembleributton-number-read.objF:\WORK\uK\AVR\Projects\ibutton-number-read\main.asmF:\WORK\uK\AVR\Projects\ibutton-number-read\AVR SimulatorATtiny2313.xmlfalseR00R01R02R03R04R05R06R07R08R09R10R11R12R13R14R15R16R17R18R19R20R21R22R23R24R25R26R27R28R29R30R31Auto000F:\WORK\uK\AVR\Projects\ibutton-number-read\main.asmF:\WORK\uK\AVR\Projects\ibutton-number-read\main.asmC:\Program Files (x86)\Atmel\AVR Tools\AvrAssembler\AppnotesIibutton-number-read00100,C:\Program Files (x86)\Atmel\AVR Tools\AvrAssembler2\Appnotes\main.asm00000main.asm100001hd44780.inc100002crc8.asm1 diff --git a/ibutton-numberSample/ibutton-number-read.aws b/ibutton-numberSample/ibutton-number-read.aws new file mode 100644 index 0000000..3879174 --- /dev/null +++ b/ibutton-numberSample/ibutton-number-read.aws @@ -0,0 +1 @@ + diff --git a/ibutton-numberSample/ibutton-number-read.hex b/ibutton-numberSample/ibutton-number-read.hex new file mode 100644 index 0000000..6181cf5 --- /dev/null +++ b/ibutton-numberSample/ibutton-number-read.hex @@ -0,0 +1,43 @@ +:020000020000FC +:1000000017C118951895189518951895189518955D +:100010001895189518951895189518951895189578 +:10002000189518951895FF1829E0001F2A9509F4CE +:100030000895FF1CF11A18F4F10E8894F6CF089475 +:10004000F4CFC69A00FFC09800FDC09A01FFC19886 +:1000500001FDC19A02FFC29802FDC29A03FFC39834 +:1000600003FDC39AC6980895C49A0F930295E9DFD9 +:100070000F91E7DFBB27AAEF58D00895C4980F93DC +:100080000295DFDF0F91DDDF02E052D00895059188 +:10009000003011F0E9DFFBCF08950A3020F017E3BC +:1000A000010FE2DF089510E3010FDEDF08951F93D3 +:1000B0000F9302950F70F1DF0F910F70EEDF1F911C +:1000C0000895EE241AE0AFDFE394FF920030D1F7F9 +:1000D00010E30F91010FC8DFEA94D1F7089500688B +:1000E000CDDF08950064CADF0895B89AB99ABA9A24 +:1000F000BB9ABC9ABE9AC498C69804E619D013E07D +:1001000003E09FDF05E014D01A95D1F702E099DFF4 +:1001100001E00ED008E2B2DF08E0B0DF01E0AEDFC0 +:1001200006E0ACDF0CE0AADF08951197F1F708951F +:100130000F93B3E0A8EEF9DFB3E0A8EEF6DF0A957F +:10014000C1F70F91089596988E9AB3E0ACEAEDDF6F +:100150008E98B0E0ACE8E9DF6894869BE894B1E063 +:10016000A0EEE3DF089518F4B0E0A2E002C0B0E032 +:10017000A0EF8E9ADADF8E98B0E0A8E7D6DF089578 +:100180001F9310E00795EFDF13951830D9F71F91F3 +:100190000895B0E0A2E08E9AC8DF8E98B0E0AAE0A1 +:1001A000C4DFE89486996894B0E0A4E6BEDF0894C2 +:1001B0000EF0889408951F9310E0EBDF07951395D8 +:1001C0001830D9F71F9108950F931F932F930F9312 +:1001D00018E020916800022707950091680010F44C +:1001E00028E102270795009368000F9106950F9369 +:1001F0001A9579F70F912F911F910F9108950F93F1 +:1002000000E0009368000F91089500916800089540 +:1002100069427574746F6E20526561646572000086 +:100220006176722D6D63752E6478702E706C00008F +:100230000FED0DBF5ADF01E052DFE0E1F2E027DF12 +:1002400001E44DDFE0E2F2E022DF7DDFF6F303E3DD +:1002500097DFD5DFB0DF0030C1F3B6DFC0E6D0E016 +:10026000099317E0A8DFB0DF09931A95D9F7CDDF1E +:10027000003059F700E433DFC0E6D0E018E0099120 +:0802800016DF1A95E1F7E1CF4A +:00000001FF diff --git a/ibutton-numberSample/ibutton-number-read.map b/ibutton-numberSample/ibutton-number-read.map new file mode 100644 index 0000000..c3a5a6a --- /dev/null +++ b/ibutton-numberSample/ibutton-number-read.map @@ -0,0 +1,522 @@ + +AVRASM ver. 2.1.30 F:\WORK\uK\AVR\Projects\ibutton-number-read\main.asm Tue Dec 06 21:13:19 2011 + + +EQU SIGNATURE_000 0000001e +EQU SIGNATURE_001 00000091 +EQU SIGNATURE_002 0000000a +EQU SREG 0000003f +EQU SPL 0000003d +EQU OCR0B 0000003c +EQU GIMSK 0000003b +EQU EIFR 0000003a +EQU TIMSK 00000039 +EQU TIFR 00000038 +EQU SPMCSR 00000037 +EQU OCR0A 00000036 +EQU MCUCR 00000035 +EQU MCUSR 00000034 +EQU TCCR0B 00000033 +EQU TCNT0 00000032 +EQU OSCCAL 00000031 +EQU TCCR0A 00000030 +EQU TCCR1A 0000002f +EQU TCCR1B 0000002e +EQU TCNT1L 0000002c +EQU TCNT1H 0000002d +EQU OCR1AL 0000002a +EQU OCR1AH 0000002b +EQU OCR1BL 00000028 +EQU OCR1BH 00000029 +EQU CLKPR 00000026 +EQU ICR1L 00000024 +EQU ICR1H 00000025 +EQU GTCCR 00000023 +EQU TCCR1C 00000022 +EQU WDTCR 00000021 +EQU PCMSK 00000020 +EQU EEAR 0000001e +EQU EEDR 0000001d +EQU EECR 0000001c +EQU PORTA 0000001b +EQU DDRA 0000001a +EQU PINA 00000019 +EQU PORTB 00000018 +EQU DDRB 00000017 +EQU PINB 00000016 +EQU GPIOR2 00000015 +EQU GPIOR1 00000014 +EQU GPIOR0 00000013 +EQU PORTD 00000012 +EQU DDRD 00000011 +EQU PIND 00000010 +EQU USIDR 0000000f +EQU USISR 0000000e +EQU USICR 0000000d +EQU UDR 0000000c +EQU UCSRA 0000000b +EQU UCSRB 0000000a +EQU UBRRL 00000009 +EQU ACSR 00000008 +EQU UCSRC 00000003 +EQU UBRRH 00000002 +EQU DIDR 00000001 +EQU PORTB0 00000000 +EQU PB0 00000000 +EQU PORTB1 00000001 +EQU PB1 00000001 +EQU PORTB2 00000002 +EQU PB2 00000002 +EQU PORTB3 00000003 +EQU PB3 00000003 +EQU PORTB4 00000004 +EQU PB4 00000004 +EQU PORTB5 00000005 +EQU PB5 00000005 +EQU PORTB6 00000006 +EQU PB6 00000006 +EQU PORTB7 00000007 +EQU PB7 00000007 +EQU DDB0 00000000 +EQU DDB1 00000001 +EQU DDB2 00000002 +EQU DDB3 00000003 +EQU DDB4 00000004 +EQU DDB5 00000005 +EQU DDB6 00000006 +EQU DDB7 00000007 +EQU PINB0 00000000 +EQU PINB1 00000001 +EQU PINB2 00000002 +EQU PINB3 00000003 +EQU PINB4 00000004 +EQU PINB5 00000005 +EQU PINB6 00000006 +EQU PINB7 00000007 +EQU OCIE0A 00000000 +EQU TOIE0 00000001 +EQU OCIE0B 00000002 +EQU OCF0A 00000000 +EQU TOV0 00000001 +EQU OCF0B 00000002 +EQU OCR0_0 00000000 +EQU OCR0_1 00000001 +EQU OCR0_2 00000002 +EQU OCR0_3 00000003 +EQU OCR0_4 00000004 +EQU OCR0_5 00000005 +EQU OCR0_6 00000006 +EQU OCR0_7 00000007 +EQU WGM00 00000000 +EQU WGM01 00000001 +EQU COM0B0 00000004 +EQU COM0B1 00000005 +EQU COM0A0 00000006 +EQU COM0A1 00000007 +EQU TCNT0_0 00000000 +EQU TCNT0_1 00000001 +EQU TCNT0_2 00000002 +EQU TCNT0_3 00000003 +EQU TCNT0_4 00000004 +EQU TCNT0_5 00000005 +EQU TCNT0_6 00000006 +EQU TCNT0_7 00000007 +EQU TCCR0 00000033 +EQU CS00 00000000 +EQU CS01 00000001 +EQU CS02 00000002 +EQU WGM02 00000003 +EQU FOC0B 00000006 +EQU FOC0A 00000007 +EQU ICIE1 00000003 +EQU TICIE 00000003 +EQU OCIE1B 00000005 +EQU OCIE1A 00000006 +EQU TOIE1 00000007 +EQU ICF1 00000003 +EQU OCF1B 00000005 +EQU OCF1A 00000006 +EQU TOV1 00000007 +EQU WGM10 00000000 +EQU PWM10 00000000 +EQU WGM11 00000001 +EQU PWM11 00000001 +EQU COM1B0 00000004 +EQU COM1B1 00000005 +EQU COM1A0 00000006 +EQU COM1A1 00000007 +EQU CS10 00000000 +EQU CS11 00000001 +EQU CS12 00000002 +EQU WGM12 00000003 +EQU CTC1 00000003 +EQU WGM13 00000004 +EQU ICES1 00000006 +EQU ICNC1 00000007 +EQU FOC1B 00000006 +EQU FOC1A 00000007 +EQU OCR1AH0 00000000 +EQU OCR1AH1 00000001 +EQU OCR1AH2 00000002 +EQU OCR1AH3 00000003 +EQU OCR1AH4 00000004 +EQU OCR1AH5 00000005 +EQU OCR1AH6 00000006 +EQU OCR1AH7 00000007 +EQU OCR1AL0 00000000 +EQU OCR1AL1 00000001 +EQU OCR1AL2 00000002 +EQU OCR1AL3 00000003 +EQU OCR1AL4 00000004 +EQU OCR1AL5 00000005 +EQU OCR1AL6 00000006 +EQU OCR1AL7 00000007 +EQU WDTCSR 00000021 +EQU WDP0 00000000 +EQU WDP1 00000001 +EQU WDP2 00000002 +EQU WDE 00000003 +EQU WDCE 00000004 +EQU WDTOE 00000004 +EQU WDP3 00000005 +EQU WDIE 00000006 +EQU WDIF 00000007 +EQU PCIE 00000005 +EQU INT0 00000006 +EQU INT1 00000007 +EQU GIFR 0000003a +EQU PCIF 00000005 +EQU INTF0 00000006 +EQU INTF1 00000007 +EQU UDR0 00000000 +EQU UDR1 00000001 +EQU UDR2 00000002 +EQU UDR3 00000003 +EQU UDR4 00000004 +EQU UDR5 00000005 +EQU UDR6 00000006 +EQU UDR7 00000007 +EQU USR 0000000b +EQU MPCM 00000000 +EQU U2X 00000001 +EQU UPE 00000002 +EQU PE 00000002 +EQU DOR 00000003 +EQU FE 00000004 +EQU UDRE 00000005 +EQU TXC 00000006 +EQU RXC 00000007 +EQU UCR 0000000a +EQU TXB8 00000000 +EQU RXB8 00000001 +EQU UCSZ2 00000002 +EQU CHR9 00000002 +EQU TXEN 00000003 +EQU RXEN 00000004 +EQU UDRIE 00000005 +EQU TXCIE 00000006 +EQU RXCIE 00000007 +EQU UCPOL 00000000 +EQU UCSZ0 00000001 +EQU UCSZ1 00000002 +EQU USBS 00000003 +EQU UPM0 00000004 +EQU UPM1 00000005 +EQU UMSEL 00000006 +EQU UBRR 00000009 +EQU ACIS0 00000000 +EQU ACIS1 00000001 +EQU ACIC 00000002 +EQU ACIE 00000003 +EQU ACI 00000004 +EQU ACO 00000005 +EQU ACBG 00000006 +EQU ACD 00000007 +EQU AIN0D 00000000 +EQU AIN1D 00000001 +EQU PORTD0 00000000 +EQU PD0 00000000 +EQU PORTD1 00000001 +EQU PD1 00000001 +EQU PORTD2 00000002 +EQU PD2 00000002 +EQU PORTD3 00000003 +EQU PD3 00000003 +EQU PORTD4 00000004 +EQU PD4 00000004 +EQU PORTD5 00000005 +EQU PD5 00000005 +EQU PORTD6 00000006 +EQU PD6 00000006 +EQU DDD0 00000000 +EQU DDD1 00000001 +EQU DDD2 00000002 +EQU DDD3 00000003 +EQU DDD4 00000004 +EQU DDD5 00000005 +EQU DDD6 00000006 +EQU PIND0 00000000 +EQU PIND1 00000001 +EQU PIND2 00000002 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+EQU PGWRT 00000002 +EQU RFLB 00000003 +EQU CTPB 00000004 +EQU ISC00 00000000 +EQU ISC01 00000001 +EQU ISC10 00000002 +EQU ISC11 00000003 +EQU SM0 00000004 +EQU SM 00000004 +EQU SE 00000005 +EQU SM1 00000006 +EQU PUD 00000007 +EQU CLKPS0 00000000 +EQU CLKPS1 00000001 +EQU CLKPS2 00000002 +EQU CLKPS3 00000003 +EQU CLKPCE 00000007 +EQU PORF 00000000 +EQU EXTRF 00000001 +EQU BORF 00000002 +EQU WDRF 00000003 +EQU CAL0 00000000 +EQU CAL1 00000001 +EQU CAL2 00000002 +EQU CAL3 00000003 +EQU CAL4 00000004 +EQU CAL5 00000005 +EQU CAL6 00000006 +EQU SFIOR 00000023 +EQU PSR10 00000000 +EQU PCINT0 00000000 +EQU PCINT1 00000001 +EQU PCINT2 00000002 +EQU PCINT3 00000003 +EQU PCINT4 00000004 +EQU PCINT5 00000005 +EQU PCINT6 00000006 +EQU PCINT7 00000007 +EQU GPIOR20 00000000 +EQU GPIOR21 00000001 +EQU GPIOR22 00000002 +EQU GPIOR23 00000003 +EQU GPIOR24 00000004 +EQU GPIOR25 00000005 +EQU GPIOR26 00000006 +EQU GPIOR27 00000007 +EQU GPIOR10 00000000 +EQU GPIOR11 00000001 +EQU GPIOR12 00000002 +EQU GPIOR13 00000003 +EQU GPIOR14 00000004 +EQU GPIOR15 00000005 +EQU GPIOR16 00000006 +EQU GPIOR17 00000007 +EQU GPIOR00 00000000 +EQU GPIOR01 00000001 +EQU GPIOR02 00000002 +EQU GPIOR03 00000003 +EQU GPIOR04 00000004 +EQU GPIOR05 00000005 +EQU GPIOR06 00000006 +EQU GPIOR07 00000007 +EQU USIDR0 00000000 +EQU USIDR1 00000001 +EQU USIDR2 00000002 +EQU USIDR3 00000003 +EQU USIDR4 00000004 +EQU USIDR5 00000005 +EQU USIDR6 00000006 +EQU USIDR7 00000007 +EQU USICNT0 00000000 +EQU USICNT1 00000001 +EQU USICNT2 00000002 +EQU USICNT3 00000003 +EQU USIDC 00000004 +EQU USIPF 00000005 +EQU USIOIF 00000006 +EQU USISIF 00000007 +EQU USITC 00000000 +EQU USICLK 00000001 +EQU USICS0 00000002 +EQU USICS1 00000003 +EQU USIWM0 00000004 +EQU USIWM1 00000005 +EQU USIOIE 00000006 +EQU USISIE 00000007 +EQU LB1 00000000 +EQU LB2 00000001 +EQU CKSEL0 00000000 +EQU CKSEL1 00000001 +EQU CKSEL2 00000002 +EQU CKSEL3 00000003 +EQU SUT0 00000004 +EQU SUT1 00000005 +EQU CKOUT 00000006 +EQU CKDIV8 00000007 +EQU BODLEVEL0 00000000 +EQU BODLEVEL1 00000001 +EQU BODLEVEL2 00000002 +EQU EESAVE 00000003 +EQU WDTON 00000004 +EQU SPIEN 00000005 +EQU DWEN 00000006 +EQU RSTDISBL 00000007 +EQU SELFPRGEN 00000000 +DEF XH r27 +DEF XL r26 +DEF YH r29 +DEF YL r28 +DEF ZH r31 +DEF ZL r30 +EQU FLASHEND 000003ff +EQU IOEND 0000003f +EQU SRAM_START 00000060 +EQU SRAM_SIZE 00000080 +EQU RAMEND 000000df +EQU XRAMEND 00000000 +EQU E2END 0000007f +EQU EEPROMEND 0000007f +EQU EEADRBITS 00000007 +EQU NRWW_START_ADDR 00000000 +EQU NRWW_STOP_ADDR 000003ff +EQU RWW_START_ADDR 00000000 +EQU RWW_STOP_ADDR 00000000 +EQU PAGESIZE 00000010 +EQU INT0addr 00000001 +EQU INT1addr 00000002 +EQU ICP1addr 00000003 +EQU OC1Aaddr 00000004 +EQU OC1addr 00000004 +EQU OVF1addr 00000005 +EQU OVF0addr 00000006 +EQU URXCaddr 00000007 +EQU URXC0addr 00000007 +EQU UDREaddr 00000008 +EQU UDRE0addr 00000008 +EQU UTXCaddr 00000009 +EQU UTXC0addr 00000009 +EQU ACIaddr 0000000a +EQU PCIaddr 0000000b +EQU OC1Baddr 0000000c +EQU OC0Aaddr 0000000d +EQU OC0Baddr 0000000e +EQU USI_STARTaddr 0000000f +EQU USI_OVFaddr 00000010 +EQU ERDYaddr 00000011 +EQU WDTaddr 00000012 +EQU INT_VECTORS_SIZE 00000013 +DSEG SerialNumber 00000060 +CSEG ProgramEntryPoint 00000118 +EQU LCD_PORT 00000018 +EQU LCD_DDR 00000017 +EQU LCD_PIN 00000016 +EQU LCD_D4 00000000 +EQU LCD_D5 00000001 +EQU LCD_D6 00000002 +EQU LCD_D7 00000003 +EQU LCD_RS 00000004 +EQU LCD_EN 00000006 +DEF drem8u r15 +DEF dres8u r16 +DEF dd8u r16 +DEF dv8u r17 +DEF dcnt8u r18 +CSEG div8u 00000013 +CSEG d8u_1 00000015 +CSEG d8u_2 00000019 +CSEG d8u_3 0000001f +CSEG LCD_WriteNibble 00000021 +CSEG LCD_WriteData 00000034 +CSEG Wait4xCycles 00000095 +CSEG LCD_WriteCommand 0000003e +CSEG WaitMiliseconds 00000098 +CSEG LCD_WriteString 00000047 +CSEG exit 0000004c +CSEG LCD_WriteHexDigit 0000004d +CSEG Num 00000053 +CSEG LCD_WriteHex8 00000057 +CSEG LCD_WriteDecimal 00000061 +CSEG LCD_WriteDecimalLoop 00000062 +CSEG LCD_WriteDecimalLoop2 00000068 +CSEG LCD_SetAddressDD 0000006f +CSEG LCD_SetAddressCG 00000072 +CSEG LCD_Init 00000075 +CSEG InitLoop 00000080 +CSEG WaitMsLoop 00000099 +EQU OW_PORT 00000012 +EQU OW_PIN 00000010 +EQU OW_DDR 00000011 +EQU OW_DQ 00000006 +DEF OWCount r17 +CSEG OWReset 000000a3 +CSEG OWWriteBit 000000b3 +CSEG OWWriteZero 000000b7 +CSEG OWWriteOne 000000b9 +CSEG OWWriteByte 000000c0 +CSEG OWWriteLoop 000000c2 +CSEG OWReadBit 000000c9 +CSEG OWReadBitEnd 000000da +CSEG OWReadByte 000000db +CSEG OWReadLoop 000000dd +DSEG _crc 00000068 +CSEG CRC8Update 000000e4 +CSEG CRC8L 000000e9 +CSEG CRC8zero 000000f2 +CSEG CRC8Init 000000ff +CSEG GetCRC8 00000105 +CSEG Text1 00000108 +CSEG Text2 00000110 +CSEG MainLoop 00000125 +CSEG StoreLoop 00000132 +CSEG LoadLoop 0000013f diff --git a/ibutton-numberSample/ibutton-number-read.obj b/ibutton-numberSample/ibutton-number-read.obj new file mode 100644 index 0000000000000000000000000000000000000000..fede1c904827b039a90f5b57112f2fb7812e4c94 GIT binary patch literal 3455 zcmbW(`G3^K83*v^n_+jp;mARN92{BB9FRLe2p|b4LaBfe0d*B~EMzfPH=6+U>R}PJ zMVH-`u(TDat&yTcsLEAH5S3yvp;lXLb-oZ94$CDeTWizw^Gx~=q(ANZHRm(4GtYd9 z20cMUNs*Do%S#+f%GSEdy^i_rDi;c=Ek1$-evM#41lfQHh6Ds75*WZ31lSlu06QZZ zkc?QsWW)iHjN!mQMm#Wxkq8WCj0A=-MgvidWFVR`7KmYt2Vxl$fuW2PATFWTre_~! zrP(M7CBu^uaSSjbm~PWy#CJ#9Xede&f~HN!lQ;^!IG&`W8#WpNjOA*%sp(Ft% zqXV04I>IsSw``PzlH>roj{+R+-8LQS*wFhz2R5!3`^ABcZ)z1Z37F7>5{__U2qme& zq+UZ%I*`)TCTKE{+JllQKw1bT89;h(grF>7a?>$E*}#+@l;i*zA(Z3-nY}_#K9JS) zuAr$vb`MIX0XZR*Ob2qC5ZDYLFK7xX1oA`21sQxfqzPE(w|o6!=gz z5164Y2)Z38OgSWIJ}~pzEciq0KVjj*b#R_X6{Iz~#W5KAWHifCbsuLnpBCdaR%afp2lB4*`qX zzY(+w_%`<{1@6ioC}=gX__{;T8emChyr4>8X*BlP4cx8H30e!3aIZ&zdpctTRRhbo zO$~6b`a)1Gu$f57hAN0id=L18xKA)G0wB;5%Hk z9q?43Y6noSP6~P%@N(5opdqwh(5paW=zySRU|r~-px1!)A)J<7z=qIaLA!zPhK>k& z9e9)v$sXV_KAA1R<6Q#;?FF9bNEEaWc+!d!^cL_v3+MSA;QQ(&LHmIpSU3^~fFE`Y z6Lb)GDu^9B1pJ8Cbr{&lC+Z0BwAv=?K4ZF@8TZ5)ur?@76v|T5(ZPq?JaY74SZMM?{V7vO-t`o>lxr!6W&$ucD__?}e z*9qjM;6OX2p=3w6&8{=a%RUUqnPewV!I|V2O)pBF>s|?MmO9t{(%L6=uKU&H-BRbe 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(x86)\Atmel\AVR Tools\AvrAssembler2\Appnotes\tn2313def.inc + F:\WORK\uK\AVR\Projects\ibutton-number-read\vectors.asm + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.inc + F:\WORK\uK\AVR\Projects\ibutton-number-read\div8u.asm + F:\WORK\uK\AVR\Projects\ibutton-number-read\wait.asm + F:\WORK\uK\AVR\Projects\ibutton-number-read\1-wire.asm + F:\WORK\uK\AVR\Projects\ibutton-number-read\crc8.asm + + + F:\WORK\uK\AVR\Projects\ibutton-number-read\ibutton-number-read.obj + + + F:\WORK\uK\AVR\Projects\ibutton-number-read\ibutton-number-read.hex + + + F:\WORK\uK\AVR\Projects\ibutton-number-read\ibutton-number-read.map + + + F:\WORK\uK\AVR\Projects\ibutton-number-read\main.asm17 + F:\WORK\uK\AVR\Projects\ibutton-number-read\main.asm42 + F:\WORK\uK\AVR\Projects\ibutton-number-read\div8u.asm12 + F:\WORK\uK\AVR\Projects\ibutton-number-read\div8u.asm15 + F:\WORK\uK\AVR\Projects\ibutton-number-read\div8u.asm20 + F:\WORK\uK\AVR\Projects\ibutton-number-read\div8u.asm27 + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm34 + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm62 + F:\WORK\uK\AVR\Projects\ibutton-number-read\wait.asm24 + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm77 + F:\WORK\uK\AVR\Projects\ibutton-number-read\wait.asm32 + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm90 + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm96 + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm101 + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm108 + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm116 + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm131 + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm133 + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm141 + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm152 + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm159 + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm166 + F:\WORK\uK\AVR\Projects\ibutton-number-read\hd44780.asm182 + F:\WORK\uK\AVR\Projects\ibutton-number-read\wait.asm34 + F:\WORK\uK\AVR\Projects\ibutton-number-read\1-wire.asm17 + F:\WORK\uK\AVR\Projects\ibutton-number-read\1-wire.asm43 + F:\WORK\uK\AVR\Projects\ibutton-number-read\1-wire.asm48 + F:\WORK\uK\AVR\Projects\ibutton-number-read\1-wire.asm51 + F:\WORK\uK\AVR\Projects\ibutton-number-read\1-wire.asm63 + F:\WORK\uK\AVR\Projects\ibutton-number-read\1-wire.asm66 + F:\WORK\uK\AVR\Projects\ibutton-number-read\1-wire.asm77 + F:\WORK\uK\AVR\Projects\ibutton-number-read\1-wire.asm95 + F:\WORK\uK\AVR\Projects\ibutton-number-read\1-wire.asm100 + F:\WORK\uK\AVR\Projects\ibutton-number-read\1-wire.asm103 + <_crc>F:\WORK\uK\AVR\Projects\ibutton-number-read\crc8.asm13 + F:\WORK\uK\AVR\Projects\ibutton-number-read\crc8.asm21 + F:\WORK\uK\AVR\Projects\ibutton-number-read\crc8.asm28 + F:\WORK\uK\AVR\Projects\ibutton-number-read\crc8.asm37 + F:\WORK\uK\AVR\Projects\ibutton-number-read\crc8.asm53 + F:\WORK\uK\AVR\Projects\ibutton-number-read\crc8.asm62 + F:\WORK\uK\AVR\Projects\ibutton-number-read\main.asm34 + F:\WORK\uK\AVR\Projects\ibutton-number-read\main.asm36 + F:\WORK\uK\AVR\Projects\ibutton-number-read\main.asm63 + F:\WORK\uK\AVR\Projects\ibutton-number-read\main.asm84 + F:\WORK\uK\AVR\Projects\ibutton-number-read\main.asm101 + + diff --git a/ibutton-numberSample/main.asm b/ibutton-numberSample/main.asm new file mode 100644 index 0000000..1e0081d --- /dev/null +++ b/ibutton-numberSample/main.asm @@ -0,0 +1,107 @@ +;------------------------------------------------------------------------------ +; iButton serial number reader +; http://avr-mcu.dxp.pl +; e-mail: radek(at)dxp.pl +; (c) Radoslaw Kwiecien +;------------------------------------------------------------------------------ +.include "tn2313def.inc" +;------------------------------------------------------------------------------ +; Defines +;------------------------------------------------------------------------------ +#define F_CPU 8000000 +;------------------------------------------------------------------------------ +; Data segment, variable definitions +;------------------------------------------------------------------------------ +.dseg + +SerialNumber: .byte 8 + +;------------------------------------------------------------------------------ +; Code segment +;------------------------------------------------------------------------------ +.cseg +;------------------------------------------------------------------------------ +; Include required files +;------------------------------------------------------------------------------ +#include "vectors.asm" +#include "hd44780.asm" +#include "wait.asm" +#include "1-wire.asm" +#include "crc8.asm" +;------------------------------------------------------------------------------ +; Constants definition +;------------------------------------------------------------------------------ +Text1 : + .db "iButton Reader",0,0 +Text2 : + .db "avr-mcu.dxp.pl",0,0 +;------------------------------------------------------------------------------ +; Program entry point +;------------------------------------------------------------------------------ +ProgramEntryPoint: + ldi r16, LOW(RAMEND) ; Initialize stack pointer + out SPL, r16 ; + + rcall LCD_Init ; Initialize LCD + + ldi r16, (HD44780_LINE0 + 1) ; + rcall LCD_SetAddressDD ; Set Display Data address to (0,1) + + ldi ZL, LOW(Text1 << 1) ; Load string address to Z + ldi ZH, HIGH(Text1<< 1) ; + rcall LCD_WriteString ; Display string + + ldi r16, (HD44780_LINE1 + 1) ; + rcall LCD_SetAddressDD ; Set Display Data address to (1,1) + + ldi ZL, LOW(Text2 << 1) ; + ldi ZH, HIGH(Text2<< 1) ; Load string address to Z + rcall LCD_WriteString ; Display string + +MainLoop: + rcall OWReset ; One wire reset + brts MainLoop ; If device not present go to MainLoop + + ldi r16, 0x33 ; Write ReadRom command + rcall OWWriteByte ; + + rcall CRC8Init ; Initialize CRC8 value + + rcall OWReadByte ; Read first byte (Family ID) + cpi r16,0 ; If first byte equal to zero, go to MainLoop + breq MainLoop ; (short circuit on one wire bus) + + rcall CRC8Update ; Update the CRC + + ldi YL, LOW(SerialNumber) ; + ldi YH, HIGH(SerialNumber) ; Load to Y address of SerialNumber table + + st Y+, r16 ; Store first byte to table, and increment pointer + + ldi r17, 7 ; 7 bytes remaining +StoreLoop: + rcall OWReadByte ; read next byte + rcall CRC8Update ; update the CRC + st Y+, r16 ; store next byte to table, and increment pointer + dec r17 ; decrement loop counter + brne StoreLoop ; if greater than zero, jump to StoreLoop + + rcall GetCRC8 ; Read computet CRC8 + cpi r16,0 ; copmare with zero + brne MainLoop ; if not equal, jump to MainLoop (bad CRC) + ; else + ldi r16, (HD44780_LINE1 + 0) ; + rcall LCD_SetAddressDD ; Set DisplayData address to (0,1) + + ldi YL, LOW(SerialNumber) ; + ldi YH, HIGH(SerialNumber) ; Load to Y address of SerialNumber table + ldi r17,8 ; 8 digits to display +LoadLoop: + ld r16, Y+ ; load to r16 byte from table + rcall LCD_WriteHex8 ; display it on LCD in HEX + dec r17 ; decrement loop conouter + brne LoadLoop ; if not zero, jump to LoadLoop + rjmp MainLoop ; jump to MainLoop +;------------------------------------------------------------------------------ +; End of file +;------------------------------------------------------------------------------ diff --git a/ibutton-numberSample/vectors.asm b/ibutton-numberSample/vectors.asm new file mode 100644 index 0000000..b42400d --- /dev/null +++ b/ibutton-numberSample/vectors.asm @@ -0,0 +1,39 @@ +.cseg +.org 0 ; Reset + rjmp ProgramEntryPoint +.org INT0addr ; External Interrupt Request 0 + reti +.org INT1addr ; External Interrupt Request 1 + reti +.org ICP1addr ; Timer/Counter1 Capture Event + reti +.org OC1Aaddr ; Timer/Counter1 Compare Match A + reti +.org OVF1addr ; Timer/Counter1 Overflow + reti +.org OVF0addr ; Timer/Counter0 Overflow + reti +.org URXCaddr ; USART, Rx Complete + reti +.org UDREaddr ; USART Data Register Empty + reti +.org UTXCaddr ; USART, Tx Complete + reti +.org ACIaddr ; Analog Comparator + reti +.org PCIaddr ; + reti +.org OC1Baddr ; + reti +.org OC0Aaddr ; + reti +.org OC0Baddr ; + reti +.org USI_STARTaddr ; USI Start Condition + reti +.org USI_OVFaddr ; USI Overflow + reti +.org ERDYaddr ; + reti +.org WDTaddr ; Watchdog Timer Overflow + reti diff --git a/ibutton-numberSample/wait.asm b/ibutton-numberSample/wait.asm new file mode 100644 index 0000000..3007fc6 --- /dev/null +++ b/ibutton-numberSample/wait.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------ +; Busy-wait loops utilities module +; For F_CPU >= 4MHz +; http://avr-mcu.dxp.pl +; e-mail : radek@dxp.pl +; (c) Radoslaw Kwiecien +;------------------------------------------------------------------------------ + +#ifndef F_CPU + #error "F_CPU must be defined!" +#endif + +#if F_CPU < 4000000 + #warning "F_CPU too low, possible wrong delay" +#endif + +#define CYCLES_PER_US (F_CPU/1000000) +#define C4PUS (CYCLES_PER_US/4) +#define DVUS(x) (C4PUS*x) + +;------------------------------------------------------------------------------ +; Input : XH:XL - number of CPU cycles to wait (divided by four) +;------------------------------------------------------------------------------ +Wait4xCycles: + sbiw XH:XL, 1 ; x-- (2 cycles) + brne Wait4xCycles ; jump if not zero (2 cycles) + ret + +;------------------------------------------------------------------------------ +; Input : r16 - number of miliseconds to wait +;------------------------------------------------------------------------------ +WaitMiliseconds: + push r16 +WaitMsLoop: + ldi XH,HIGH(DVUS(500)) + ldi XL,LOW(DVUS(500)) + rcall Wait4xCycles + ldi XH,HIGH(DVUS(500)) + ldi XL,LOW(DVUS(500)) + rcall Wait4xCycles + dec r16 + brne WaitMsLoop + pop r16 + ret +;------------------------------------------------------------------------------ +; +;------------------------------------------------------------------------------ diff --git a/main.asm b/main.asm index 1422fb3..2d91214 100644 --- a/main.asm +++ b/main.asm @@ -1,90 +1,198 @@ -; -; chenillarEssai3.asm -; -; Created: 19-03-18 13:13:56 -; Author : Adrien -; +;------------------------------------------------------------------------------ +; iButton serial number reader +; Addapter pour lire le 18b20 par http://adriy.be +; http://avr-mcu.dxp.pl +; e-mail: radek(at)dxp.pl +; (c) Radoslaw Kwiecien +;------------------------------------------------------------------------------ + +;------------------------------------------------------------------------------ +; Defines +;------------------------------------------------------------------------------ +#define F_CPU 16000000 + +;Table 3. DS18B20 Function Command Set p12 +#define ReadRom 0x33 +#define SkipRom 0xcc +#define ConvertTemp 0x44 ; Initiates temperature conversion. +#define WScratch 0x4e ; Writes data into scratchpad bytes 2, 3, and4 (TH, TL, and configuration registers). +#define RScratch 0xbe ; Reads the entire scratchpad including theCRC byte. +;------------------------------------------------------------------------------ +; Data segment, variable definitions +;------------------------------------------------------------------------------ .dseg -.def rtmp = r16 -.def rdec = r17 -.def rsens = r18 +SerialNumber: .byte 8 + +;------------------------------------------------------------------------------ +; Code segment +;------------------------------------------------------------------------------ .cseg -.include "m328pdef.inc" +;------------------------------------------------------------------------------ +; Include required files +;------------------------------------------------------------------------------ +#include "vectors.asm" +#include "hd44780.asm" +#include "wait.asm" +#include "1-wire.asm" +#include "crc8.asm" +;------------------------------------------------------------------------------ +; Constants definition +;------------------------------------------------------------------------------ +Text1 : + .db "iButton Reader",0,0 +Text2 : + .db "avr-mcu.dxp.pl",0,0 +Tp : + .db ".",0,0 +;------------------------------------------------------------------------------ +; Program entry point +;------------------------------------------------------------------------------ +ProgramEntryPoint: + ldi r16, LOW(RAMEND) ; Initialize stack pointer + out SPL, r16 ; -.org 0x0000 -jmp RESET -.org OC0Aaddr -jmp TIM0_COMPA ; Timer0 CompareA -.org OVF0addr -jmp TIM0_OVF + rcall LCD_Init ; Initialize LCD + + ldi r16, (HD44780_LINE0 + 1) ; + rcall LCD_SetAddressDD ; Set Display Data address to (0,1) + + ldi ZL, LOW(Text1 << 1) ; Load string address to Z + ldi ZH, HIGH(Text1<< 1) ; + rcall LCD_WriteString ; Display string + + ldi r16, (HD44780_LINE1 + 1) ; + rcall LCD_SetAddressDD ; Set Display Data address to (1,1); + + ;ldi ZL, LOW(Text2 << 1) ; + ;ldi ZH, HIGH(Text2<< 1) ; Load string address to Z + ;rcall LCD_WriteString ; Display string +ConfigResolTo10Bits: + rcall OWReset + brts ConfigResolTo10Bits + ldi r16, SkipRom ; Write Skip Rom one wire in "single-drop" + rcall OWWriteByte + ldi r16, WScratch + rcall OWWriteByte + clr r16 + rcall OWWriteByte ;th,tl + rcall OWWriteByte ;th,tl + ldi r16, 63 + rcall OWWriteByte ;resol -.org 0x0100 +MainLoop: +ldi r16, (HD44780_LINE1 + 1) ; + rcall LCD_SetAddressDD ; Set Display Data address to (1,1); + rcall OWReset ; One wire reset + brts MainLoop ; If device not present go to MainLoop -RESET: -ldi rtmp, HIGH(RAMEND) ;Charge la valeur haute de l?adresse en fin m?moire RAM -out SPH, rtmp ;Positionne le pointeur de pile haut sur cette adresse -ldi rtmp, LOW(RAMEND) ;Charge la valeur basse de l?adresse en fin m?moire RAM -out SPL, rtmp ;Positionne le pointeur de pile bas sur cette adresse -; Replace with your application code -ser rtmp ;Port en sortie (les bits du port sont mis ? 1, soit en sortie) -out DDRD, rtmp ;Ecriture sur le -clr rtmp ;Port en bas (les bits du port sont mis ? 0, Led ?teinte) -ldi rtmp, 0x01 -out PORTD, rtmp ;PINB1 Mis ? 1 -clr rsens -;_____________________________________________________________________________ -;Setup Timer0 -;_____________________________________________________________________________ -CLR rtmp -OUT TCCR0A, rtmp ;Normal port op -LDI rtmp, 0x01 -OUT TCCR0B, rtmp ; No Force, No wave, Clk from precal/1024, 7.8125Khz, 128?s -ldi rtmp, 0x02 -sts TIMSK0, rtmp ; OCR0A Interrupt Enable -CLR rtmp -OUT TCNT0, rtmp ; -LDI rtmp, 0xff -OUT OCR0A, rtmp ; 256*128?s = 16ms -LDI rdec, 0xFF -;_____________________________________________________________________________ -;Setup PWM Timer0 -;_____________________________________________________________________________ + rcall TempRequest + rcall MainReadTemp + rcall ConvertTempForLCD -SEI + ;rcall CRC8Init ; Initialize CRC8 value + jmp LoadLoop + rcall OWReadByte ; Read first byte (Family ID) + cpi r16,0 ; If first byte equal to zero, go to MainLoop + breq MainLoop ; (short circuit on one wire bus) + + rcall CRC8Update ; Update the CRC + + ldi YL, LOW(SerialNumber) ; + ldi YH, HIGH(SerialNumber) ; Load to Y address of SerialNumber table + + st Y+, r16 ; Store first byte to table, and increment pointer + + ldi r17, 7 ; 7 bytes remaining +StoreLoop: + rcall OWReadByte ; read next byte + rcall CRC8Update ; update the CRC + st Y+, r16 ; store next byte to table, and increment pointer + dec r17 ; decrement loop counter + brne StoreLoop ; if greater than zero, jump to StoreLoop + + rcall GetCRC8 ; Read computet CRC8 + cpi r16,0 ; copmare with zero + brne MainLoop ; if not equal, jump to MainLoop (bad CRC) + ; else + ldi r16, (HD44780_LINE1 + 0) ; + rcall LCD_SetAddressDD ; Set DisplayData address to (0,1) + + ldi YL, LOW(SerialNumber) ; + ldi YH, HIGH(SerialNumber) ; Load to Y address of SerialNumber table + ldi r17,2 ; 8 digits to display +LoadLoop: + push r16 + mov r16, XL ; load to r16 byte from table + + push r16 + ldi r19,0xF0 + and r16,r19 + rcall bin2bcd8 + lsr r16 + lsr r16 + lsr r16 + lsr r16 + rcall LCD_WriteHexDigit ; display it on LCD in HEX + pop r16 + rcall bin2bcd8 + ldi r18,0x0F + and r16,r18 + rcall LCD_WriteHexDigit ; display it on LCD in HEX -start: - nop + + + + + mov r16, r18 ; load to r16 byte from table + + push r16 + ldi r19,0xF0 + and r16,r19 + rcall bin2bcd8 + lsr r16 + lsr r16 + lsr r16 + lsr r16 + rcall LCD_WriteHexDigit ; display it on LCD in HEX + pop r16 + rcall bin2bcd8 + ldi r18,0x0F + and r16,r18 + rcall LCD_WriteHexDigit ; display it on LCD in HEX nop nop - jmp PC-2 - - -TIM0_COMPA: -dec rdec -BRNE PC+7 -in rtmp, PORTD -lsl rtmp ;Shift left -BRCC PC+2; Si le cary est ? 0 rtmp est dif de 0x00 Si carry est ? 1, rtmp = 0x00 donc on le met ? 0x01 -ldi rtmp, 0x01 -out PORTD, rtmp -ldi r18, 0xff -ldi rtmp, 0x00 -out TCNT0, rtmp -reti ;Fin de l?interruption - -TIM0_OVF: -dec rdec -BRNE PC+1 + nop + jmp MainLoop + brne LoadLoop ; if not zero, jump to LoadLoop + rjmp MainLoop ; jump to MainLoop +;------------------------------------------------------------------------------ +; End of file +;------------------------------------------------------------------------------ -in rtmp, PORTD -lsl rtmp ;Shift left -BRCC PC+2; Si le cary est ? 0 rtmp est dif de 0x00 Si carry est ? 1, rtmp = 0x00 donc on le met ? 0x01 -ldi rtmp, 0x01 -out PORTD, rtmp -reti \ No newline at end of file + +;======= Converting from HEX to BCD ====================================================https://evileg.com/en/post/19/ +;***************************************************** +;* "bin2BCD8" - 8-bit Binary to BCD conversion +;* This subroutine converts an 8-bit number (temp) to a 2-digit +;* i.e 0x15 becomes 0x21 +;* result in temp +;********************************************************** +;.def tBCD = r21 ;add this to main asm file +; +bin2bcd8: + clr r21 ;clear temp reg +bBCD8_1: + subi r16,10 ;input = input - 10 + brcs bBCD8_2 ;abort if carry set + subi r21,-$10 ;tBCD = tBCD + 10 + rjmp bBCD8_1 ;loop again +bBCD8_2: + subi r16,-10 ;compensate extra subtraction + add r16,r21 + ret \ No newline at end of file diff --git a/vectors.asm b/vectors.asm new file mode 100644 index 0000000..31bf0c6 --- /dev/null +++ b/vectors.asm @@ -0,0 +1,92 @@ +.cseg +.org 0 ; Reset + rjmp ProgramEntryPoint +.org INT0addr + reti +.org INT1addr + reti +.org PCI0addr + reti +.org PCI1addr + reti +.org PCI2addr + reti +.org WDTaddr + reti +.org OC2Aaddr + reti +.org OC2Baddr + reti +.org OVF2addr + reti +.org ICP1addr + reti +.org OC1Aaddr + reti +.org OC1Baddr + reti +.org OVF1addr + reti +.org OC0Aaddr + reti +.org OC0Baddr + reti +.org OVF0addr + reti +.org SPIaddr + reti +.org URXCaddr + reti +.org UDREaddr + reti +.org UTXCaddr + reti +.org ADCCaddr + reti +.org ERDYaddr + reti +.org ACIaddr + reti +.org TWIaddr + reti +.org SPMRaddr + reti + + + +; .org INT0addr ; External Interrupt Request 0 +; reti +; .org INT1addr ; External Interrupt Request 1 +; reti +; .org ICP1addr ; Timer/Counter1 Capture Event +; reti +; .org OC1Aaddr ; Timer/Counter1 Compare Match A +; reti +; .org OVF1addr ; Timer/Counter1 Overflow +; reti +; .org OVF0addr ; Timer/Counter0 Overflow +; reti +; .org URXCaddr ; USART, Rx Complete +; reti +; .org UDREaddr ; USART Data Register Empty +; reti +; .org UTXCaddr ; USART, Tx Complete +; reti +; .org ACIaddr ; Analog Comparator +; reti +; .org PCIaddr ; +; reti +; .org OC1Baddr ; +; reti +; .org OC0Aaddr ; +; reti +; .org OC0Baddr ; +; reti +; .org USI_STARTaddr ; USI Start Condition +; reti +; .org USI_OVFaddr ; USI Overflow +; reti +; .org ERDYaddr ; +; reti +; .org WDTaddr ; Watchdog Timer Overflow +; reti diff --git a/wait.asm b/wait.asm new file mode 100644 index 0000000..3007fc6 --- /dev/null +++ b/wait.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------ +; Busy-wait loops utilities module +; For F_CPU >= 4MHz +; http://avr-mcu.dxp.pl +; e-mail : radek@dxp.pl +; (c) Radoslaw Kwiecien +;------------------------------------------------------------------------------ + +#ifndef F_CPU + #error "F_CPU must be defined!" +#endif + +#if F_CPU < 4000000 + #warning "F_CPU too low, possible wrong delay" +#endif + +#define CYCLES_PER_US (F_CPU/1000000) +#define C4PUS (CYCLES_PER_US/4) +#define DVUS(x) (C4PUS*x) + +;------------------------------------------------------------------------------ +; Input : XH:XL - number of CPU cycles to wait (divided by four) +;------------------------------------------------------------------------------ +Wait4xCycles: + sbiw XH:XL, 1 ; x-- (2 cycles) + brne Wait4xCycles ; jump if not zero (2 cycles) + ret + +;------------------------------------------------------------------------------ +; Input : r16 - number of miliseconds to wait +;------------------------------------------------------------------------------ +WaitMiliseconds: + push r16 +WaitMsLoop: + ldi XH,HIGH(DVUS(500)) + ldi XL,LOW(DVUS(500)) + rcall Wait4xCycles + ldi XH,HIGH(DVUS(500)) + ldi XL,LOW(DVUS(500)) + rcall Wait4xCycles + dec r16 + brne WaitMsLoop + pop r16 + ret +;------------------------------------------------------------------------------ +; +;------------------------------------------------------------------------------