#define F_CPU 16000000UL // 16 MHz // Calculate the value needed for // the CTC match value in OCR1A. #define CTC_MATCH_OVERFLOW ((F_CPU / 1000) / 8) #include #include #include volatile unsigned long timer1_millis; void timer1_init() { // clear to compar (CTC) mode, Clock/8 TCCR1B |= (1 << WGM12) | (1 << CS11); OCR1AH = (CTC_MATCH_OVERFLOW >> 8); OCR1AL = CTC_MATCH_OVERFLOW; // Activation du mode comparaison TIMSK1 |= (1 << OCIE1A); sei(); } void interup_1hz_init()//DS1307 { EICRA |= 1< #include #include "timer.h" volatile unsigned long us = 0; volatile unsigned long us_s = 0; volatile unsigned long int s = 0; #define calibration 1; void timer1_init() { TCCR1A = 0x00; //Désactive les comparateur + Mode normal TCCR1B = 0x00;//Mise a zero de toutes les valeurs us = 0; s = 0; TCNT1 = 0x0000; /* Horloge à 16Mhz 1 période = 62.5ns clk/8 = 0.5µs débordement à 32768 µs clk/64 = 4µs débordement à 262144 µs clk/256 = 16µs débordement à 1 048 576µs clk/1024 = 64µs débordement à 4 194 304µs Le prescale sera à 8 * TCCR1B |= (1<